Patents
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
06/2005
06/02/2005US20050117406 Semiconductor integrated circuit device with main cell array and fuse cell array
06/02/2005US20050116765 Semiconductor integrated circuit
06/02/2005US20050116759 Programmable jitter signal generator
06/02/2005US20050116758 Wide frequency range voltage-controlled oscillators (vco)
06/02/2005US20050116756 Pulse-based flip-flop
06/02/2005US20050116753 Circuit and method for switching an electrical load on after a delay
06/02/2005US20050116752 Output buffer with adjustment of signal transitions
06/02/2005US20050116690 High-voltage generator and accelerator using same
06/02/2005DE10349092A1 Integrierte Schaltungsanordnung zum Erkennen und Ausgeben von Steuersignalen Integrated circuit arrangement for detecting and outputting control signals
06/02/2005DE102004050621A1 Digital circuit e.g. signal processor, for clock interpolation, has multiplier that multiplies frequency value of input signal measured by measuring circuit with interpolation factor and outputs multiplied value to oscillator
06/02/2005DE102004042782A1 Treiberschaltung und Halbleitervorrichtung Driver circuit and the semiconductor device
06/02/2005DE102004031448A1 Synchronous semiconductor memory device, has two clock buffers receiving external clock signal and clock bar signal through its non-inverting terminal and inverting terminal, and vice versa to output clock input signals
06/01/2005EP1536561A1 Current controlled oscillator
06/01/2005EP1344073B1 Calibrating single ended channels for obtaining differential performance level
06/01/2005CN1622463A 电平移位电路 Level shift circuit
06/01/2005CN1622461A Circuit and method for switching an electrical load on after a delay
06/01/2005CN1622459A CMOS comparator
06/01/2005CN1622458A Comparator circuit and method for inputting signal by using comparator
06/01/2005CN1622421A Delay device and power supply device
06/01/2005CN1621995A Resonant tree driven clock distribution grid
06/01/2005CN1204686C Power level detecting circuit
05/2005
05/31/2005US6900703 Method and system for adjusting a frequency range of a delay cell of a VCO
05/31/2005US6900685 Tunable delay circuit
05/31/2005US6900684 Pulse processing circuit and frequency multiplier circuit
05/31/2005US6900683 Apparatus and method for generating a predetermined time delay in a semiconductor circuit
05/31/2005US6900682 Clock generator with programmable non-overlapping-clock-edge capability
05/31/2005US6900681 Phase interpolator and receiver for adjusting clock phases into data phases
05/31/2005US6900680 Clock controlling method and circuit
05/31/2005US6900679 Digital phase control circuit
05/31/2005US6900673 Microcontroller unit
05/31/2005US6900672 Driver circuit having a slew rate control system with improved linear ramp generator including ground
05/31/2005US6900669 Area efficient on-chip timeout generator with low temperature and low supply voltage dependency
05/26/2005WO2005048455A1 Delayed locked loop phase blender circuit
05/26/2005US20050114820 Resonant tree driven clock distribution grid
05/26/2005US20050114047 Measurement interface optimized for both differential and single-ended inputs
05/26/2005US20050111602 Timing comparator, data sampling apparatus, and testing apparatus
05/26/2005US20050111583 Delay device, power supply device, and program product for delaying signal
05/26/2005US20050111539 Equalization method and apparatus using the same
05/26/2005US20050111264 Flash memory device
05/26/2005US20050110579 Generating an oscillating signal according to a control current
05/26/2005US20050110554 Digital phase mixers with enhanced speed
05/26/2005US20050110548 Variable delay circuit
05/26/2005US20050110546 Method and integrated circuit apparatus for reducing simultaneously switching output
05/26/2005US20050110545 Clock regulation apparatus and circuit arrangement
05/26/2005US20050110544 Clock recovery circuit and communication device
05/26/2005US20050110540 Delay locked loop and its control method
05/26/2005US20050110531 Driver circuit
05/26/2005US20050110530 Differential output circuit
05/26/2005US20050110526 Disconnection and short detecting circuit that can detect disconnection and short of a signal line transmitting a differential clock signal
05/26/2005US20050110524 Synchronizing signals between clock domains
05/26/2005US20050110523 Noisy clock test method and apparatus
05/25/2005EP1533921A2 Digital optical receiving apparatus and method for monitoring the quality of a modulated optical transmission signal
05/25/2005EP1533677A2 Multiple mode clock receiver
05/25/2005EP1532737A1 Synchronous mirror delay (smd) circuit and method including a counter and reduced size bi-directional delay line
05/25/2005DE102004034765A1 Charakterisierung eines periodischen Jitters unter Verwendung einer Pseudozufallsabtastung Characterization of a periodic jitter using a pseudo-random sampling
05/25/2005DE10164839B4 Delay circuit for ring oscillator in which delay routes are connected parallel with input terminal
05/25/2005CN1620762A Noise elimination circuit
05/25/2005CN1619966A Delay locked loop and its control method
05/25/2005CN1619965A Differential output circuit
05/25/2005CN1619963A Infrared radiation receiving circuit, electronic device, and infrared radiation receiving method
05/25/2005CN1619960A Equalization method and apparatus using the same
05/25/2005CN1619936A Converter circuit and motor driving apparatus
05/25/2005CN1203613C Fixed time equipment divided circuit, clock controling circuit and signal control method
05/24/2005US6898742 System and method for automatic deskew across a high speed, parallel interconnection
05/24/2005US6898091 Circuit configuration comprising a control loop
05/24/2005US6897712 Apparatus and method for detecting loss of high-speed signal
05/24/2005US6897705 Semiconductor device using current mirror circuit
05/24/2005US6897703 Voltage clamp circuit
05/24/2005US6897702 Process variation compensated high voltage decoupling capacitor biasing circuit with no DC current
05/24/2005US6897699 Clock distribution network with process, supply-voltage, and temperature compensation
05/24/2005US6897696 Duty-cycle adjustable buffer and method and method for operating same
05/24/2005US6897695 Semiconductor integrated circuit device and method of detecting delay error in the same
05/24/2005US6897694 Circuitry for reducing the skew between two signals
05/24/2005US6897693 Delay locked loop for improving high frequency characteristics and yield
05/24/2005US6897686 Pulse peak and/or trough detector
05/24/2005US6897685 Differential data transmitter
05/24/2005US6897643 Integrated circuit driver having stable bootstrap power supply
05/19/2005WO2005046094A1 Method and system for converting an optical received pulse train into an electrical output pulse train
05/19/2005WO2004100374A3 Time delay apparatus and method of using same
05/19/2005WO2004073293A3 40-gb/s clock and data recovery circuit in 0.18 micrometers technology
05/19/2005US20050105607 Method and circuit for timing pulse generation
05/19/2005US20050105586 Temperature sensor circuit
05/19/2005US20050104673 Semiconductor integrated circuit
05/19/2005US20050104656 Amplifier
05/19/2005US20050104646 Clock gated power supply noise compensation
05/19/2005US20050104644 Digital delay device, digital oscillator clock signal generator and memory interface
05/19/2005US20050104640 Apparatus and method for duty cycle correction
05/19/2005US20050104638 Clock control method and circuit
05/19/2005US20050104632 Geometric remapping with delay lines
05/19/2005US20050104631 Comparing circuit, comparator, level determining circuit and threshold voltage setting method
05/19/2005US20050104630 Automotive ignition system with battery dependent over-dwell protection
05/19/2005US20050104628 Signal level detector and amplification factor control system using signal level detector
05/19/2005US20050104626 Comparator circuit
05/19/2005US20050104619 Method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time
05/18/2005EP1531548A2 A comparator circuit and its use in an automotive ignition system with battery dependent over-dwell protection.
05/18/2005EP1530778A1 Method for regulating the input signal of a non-contact transponder
05/18/2005CN2701170Y A real-time clock control circuit
05/18/2005CN1618022A Input buffer and method for voltage level detection
05/18/2005CN1617447A Circuit for indipendently regulating rise and down boundary time of signal
05/18/2005CN1617446A Frequency multiplication system based on full digital logic circuit