Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
11/2005
11/03/2005US20050242867 Differential clocking scheme in an integrated circuit having digital multiplexers
11/03/2005US20050242866 Programmable logic device having an embedded differential clock tree
11/03/2005US20050242865 Differential clock tree in an integrated circuit
11/03/2005US20050242864 Semiconductor device, semiconductor system, and digital delay circuit
11/03/2005US20050242860 FFT-based multichannel video receiver
11/03/2005US20050242859 Differential master/slave CML latch
11/03/2005US20050242857 Duty cycle correction
11/03/2005US20050242854 Delay locked loop circuit
11/03/2005US20050242845 Efficient current monitoring for DC-DC converters
11/03/2005US20050242844 Clocked comparator circuit
11/03/2005US20050242843 Differential current mode phase/frequency detector circuit
11/03/2005DE102004018986B3 Verfahren zur Erzeugung eines Signals mit einem vorgebbaren Pulsdach A method for generating a signal with a predeterminable pulse roof
11/03/2005CA2562577A1 Method and device for measuring with synchronous detection and correlated sampling
11/02/2005EP1592154A2 Methods and circuits for frequency modulation that reduce the spectral noise of switching regulators
11/02/2005EP1592125A1 Differential current mode phase/frequency detector circuit
11/02/2005CN1691509A Differential current mode phase/frequency detector circuit
11/02/2005CN1691504A Impulse generation circuit
11/02/2005CN1691203A Duty cycle correction apparatus and method for use in a semiconductor memory device
11/02/2005CN1691100A Current driver
11/02/2005CN1225837C Output circuit
11/02/2005CN1225703C Signal receiving circuit, data transmission controller and electronic equipment
11/01/2005US6961095 Digital display jitter correction apparatus and method
11/01/2005US6960960 Frequency detector detecting variation in frequency difference between data signal and clock signal
11/01/2005US6960952 Configuring and selecting a duty cycle for an output driver
11/01/2005US6960951 Circuit for detecting a logic transition with improved stability of the length of a detection signal pulse
11/01/2005US6960942 High speed phase selector
11/01/2005US6960940 Short circuit protection apparatus with self-clocking self-clearing latch
11/01/2005US6960925 Input buffer with automatic switching point adjustment circuitry, and synchronous DRAM device including same
10/2005
10/27/2005WO2005101778A1 Apparatus for and method of controlling a sampling frequency of a sampling device
10/27/2005WO2005101777A1 Apparatus for and method of controlling a digital demodulator coupled to an equalizer
10/27/2005WO2005101662A1 Systems and methods for precharging circuitry for pulse generation
10/27/2005WO2005101661A1 Systems and methods for providing amplitude selection for pulse generation
10/27/2005WO2005101660A1 Voltage limited systems and methods
10/27/2005WO2005101656A1 Apparatus for and method of controlling the operation of an equalizer
10/27/2005WO2005101655A1 Advanced digital receiver
10/27/2005WO2005101654A1 Apparatus for and method of controlling a feedforward filter of an equalizer
10/27/2005WO2005101653A1 Apparatus for and method of controlling a feedforward filter of an equalizer
10/27/2005WO2005101652A1 Apparatus for and method of controlling a feedforward filter of an equalizer
10/27/2005WO2005099407A2 Apparatus for and method of developing equalized values from samples of a signal received from a channel
10/27/2005WO2005099399A2 Apparatus for and method of controlling sampling frequency and sampling phase of a sampling device
10/27/2005US20050240791 Interleaved delay line for phase locked and delay locked loops
10/27/2005US20050239433 Input circuit for an electronic circuit
10/27/2005US20050238128 Duty cycle correction apparatus and method for use in a semiconductor memory device
10/27/2005US20050238119 Adaptive hysteresis receiver for a high speed digital signal
10/27/2005US20050237848 Semiconductor memory device and semiconductor device and semiconductor memory device control method
10/27/2005US20050237825 Data processing apparatus
10/27/2005US20050237122 Cross coupled voltage controlled oscillator
10/27/2005US20050237120 Phase-locked loop integrated circuits having fast phase locking characteristics
10/27/2005US20050237093 Adjustable frequency delay-locked loop
10/27/2005US20050237090 Frequency synthesizer and method
10/27/2005US20050237089 Method and circuit thereof for smapling/holding signal
10/27/2005DE19704519B4 Vorrichtung zur Frequenzgangkompensation eines Audiosignals Apparatus for frequency compensation of an audio signal
10/27/2005DE102004057518A1 Schieberegister und Treiberverfahren für dieses sowie LCD-Treibervorrichtung mit einem solchen Shift register and driving method for this, as well as LCD-driver device having such
10/27/2005DE102004016073A1 Verfahren zur Erzeugung eines Impulsausgangssignals aus einem periodischen Sägezahnsignal und einer Referenzspannung, und getakteter Stromwandler A method for generating a pulse output signal from a periodic sawtooth signal and a reference voltage, and a clocked current transformer
10/27/2005DE10130508B4 Verzögerungsregelkreis mit komplementäre Signale erzeugender Verzögerungseinheit Delay locked loop with complementary signals generating delay unit
10/27/2005CA2560785A1 Advanced digital receiver
10/27/2005CA2560737A1 Apparatus for and method of controlling the operation of an equalizer
10/27/2005CA2560736A1 Apparatus for and method of controlling a digital demodulator coupled to an equalizer
10/27/2005CA2560735A1 Apparatus for and method of controlling a feedforward filter of an equalizer
10/27/2005CA2560734A1 Apparatus for and method of controlling a feedforward filter of an equalizer
10/27/2005CA2560733A1 Apparatus for and method of controlling a feedforward filter of an equalizer
10/27/2005CA2560729A1 Apparatus for and method of developing equalized values from samples of a signal received from a channel
10/27/2005CA2560728A1 Apparatus for and method of controlling sampling frequency and sampling phase of a sampling device
10/27/2005CA2560540A1 Apparatus for and method of controlling a sampling frequency of a sampling device
10/26/2005EP1589682A1 Demultiplexer circuit
10/26/2005EP1589659A1 Method for generating a pulse signal with a predetermined shape
10/26/2005EP1589657A1 Control circuit of the transconductance of at least one transistor in conduction
10/26/2005EP1588488A2 Programmable dual-edge triggered counter
10/26/2005CN1689291A Method of and means for recognizing signal edges
10/26/2005CN1689229A Pulse generator
10/26/2005CN1225085C Circuit for formation of pulse signal from clock signal
10/26/2005CN1224876C Clock synchronous circuit
10/26/2005CN1224873C Clock generating circuit and clock generating method
10/25/2005US6959063 Fractional-N phase locked loop
10/25/2005US6959062 Variable delay line
10/25/2005US6959016 Method and apparatus for adjusting the timing of signals over fine and coarse ranges
10/25/2005US6958765 Pulse shaping system, laser printer, pulse shaping method and method of generating serial video data for laser printer
10/25/2005US6958652 Transconductance varying circuit of transconductor circuit, varying bandwidth filter circuit using the same and digital tuning circuit of transconductor-capacitor filter
10/25/2005US6958644 Active filter circuit with dynamically modifiable gain
10/25/2005US6958641 Delay circuit with more-responsively adapting delay time
10/25/2005US6958639 Digital duty cycle correction circuit and method for multi-phase clock
10/25/2005US6958638 Slew rate controlling method and system for output data
10/25/2005US6958636 Charge leakage correction circuit for applications in PLLs
10/25/2005US6958635 Low-power direct digital synthesizer with analog interpolation
10/25/2005US6958634 Programmable direct interpolating delay locked loop
10/25/2005US6958628 Three-transistor NAND and NOR gates for two-phase clock generators
10/20/2005WO2005098459A1 Detector of differential threshold voltage
10/20/2005WO2004066487A3 High speed track and hold amplifier for direct digital down-conversion
10/20/2005US20050232386 Synchronization circuit and synchronization method
10/20/2005US20050232371 Method and apparatus for data transfer using wideband bursts
10/20/2005US20050232348 Apparatus and method for error propagation reduction in a decision feedback equalizer
10/20/2005US20050232347 Apparatus and method for noise enhancement reduction in an adaptive equalizer
10/20/2005US20050231493 Video signal processor, method using the same, display device and method using the same
10/20/2005US20050231293 Clock-pulse generator circuit
10/20/2005US20050231266 High voltage generation circuit
10/20/2005US20050231261 Wide common mode high-speed differential receiver using thin and thick gate oxide MOSFETS in deep-submicron technology
10/20/2005US20050231255 Duty ratio corrector, and memory device having the same
10/20/2005US20050231252 Transmission line driver for controlling slew rate and methods thereof
10/20/2005US20050231249 DLL circuit with delay equal to one clock cycle
10/20/2005US20050231247 Delay locked loop
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