H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass

Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
12/2004
12/16/2004	US20040251941 High-precision current-mode pulse-width-modulation circuit
12/16/2004	US20040251934 Capacitor charging methods and apparatuses that use a secure parallel monitoring circuit
12/16/2004	US20040251484 Semiconductor integrated circuit device
12/16/2004	US20040251401 Delay circuit and test apparatus
12/16/2004	DE10320793A1 Latch or phase detector circuit for DRAM data storage uses flip flop stage and cascaded NAND gates to give output depending on clock and data state change phase
12/16/2004	DE102004026156A1 A/D-Umsetzverfahren und -gerät A / D conversion method and apparatus
12/15/2004	EP1485999A1 Method and apparatus for digital frequency conversion
12/15/2004	EP1485998A2 Electronic circuit comprising an amplifier for amplifying a binary signal
12/15/2004	CN1555004A Display card for increasing video play smooth degree
12/14/2004	US6831524 Feed forward voltage controlled ring oscillator
12/14/2004	US6831520 Amplifier circuit apparatus and method of EMI suppression
12/14/2004	US6831493 Duty cycle regulator
12/14/2004	US6831490 Clock synchronization circuit and method
12/09/2004	WO2004107575A1 Oscillation circuit
12/09/2004	US20040247045 Device for receiving series data
12/09/2004	US20040247025 Feed forward equalizer and a method for analog equalization of a data signal
12/09/2004	US20040246227 Active matrix display device
12/09/2004	US20040246041 Feedback control system and method
12/09/2004	US20040246036 Delay stage insensitive to operating voltage and delay circuit including the same
12/09/2004	US20040246035 Semiconductor integrated circuit
12/09/2004	US20040246034 Reproduced signal waveform processing apparatus
12/09/2004	US20040246033 Synchronizer signal generator device and process for generating a synchronizer signal
12/09/2004	US20040246031 Ultra-low power programmable timer and low voltage detection circuits
12/09/2004	US20040246030 Speeded up multistage comparator with power reduction and reliable output
12/09/2004	US20040246022 Adaptive level binary logic
12/09/2004	US20040245979 Semiconductor integrated circuit
12/09/2004	DE10318603A1 Input reception circuit for weak high speed signal for generating several output signals, which can be processed at lower detecting speed
12/09/2004	DE10200898B4 Integrierte Schaltung und Verfahren zum Betrieb einer integrierten Schaltung Integrated circuit and method for operating an integrated circuit
12/08/2004	CN1554051A Electric device with data communication bus
12/08/2004	CN1553703A Continuous impulse link generator by low-voltage clock signal
12/08/2004	CN1553572A Electromagnetic interference preventing circuit of pluse buffer and method thereof
12/08/2004	CN1553571A Pulse distance voltage converter and converting method thereof
12/08/2004	CN1179474C Booster and integrated circuit card with said booster and its electronic apparatus
12/07/2004	US6829298 Signal processing circuit for a digital signal receiving system
12/07/2004	US6829296 Spectrally flat time domain equalizer and methods
12/07/2004	US6828866 High noise rejection voltage-controlled ring oscillator architecture
12/07/2004	US6828853 Wide dynamic range demodulator for smart cards or contactless tickets
12/07/2004	US6828842 Semiconductor integrated circuit device
12/07/2004	US6828840 Clock pulse generator
12/07/2004	US6828839 Clock period sensing circuit
12/07/2004	US6828836 Two comparator voltage mode PWM
12/07/2004	US6828830 Low power, area-efficient circuit to provide clock synchronization
12/07/2004	US6828828 Dynamic control of switching reference voltage
12/02/2004	WO2004105281A1 Linear derivative equalizer, and associated method, for a radio communication system
12/02/2004	WO2004105241A1 Flip-flop circuit having majority decision logic circuit
12/02/2004	WO2004105229A1 Delay line based multiple frequency generator circuits for cdma processing
12/02/2004	WO2004055989A3 Low lock time delay locked loops using time cycle supppressor
12/02/2004	US20040243871 Electric device with data communication bus
12/02/2004	US20040242171 Transmitter circuit, transmission circuit and driver unit
12/02/2004	US20040240598 Method and system for pattern-independent phase adjustment in a clock and data recovery (CDR) circuit
12/02/2004	US20040240538 Equalizer with combined CCK encoding-decoding in feedback filtering of decision feedback equalizer
12/02/2004	US20040239546 A/d conversion method and apparatus
12/02/2004	US20040239396 Digital delay line
12/02/2004	US20040239391 Method and structure for dynamic slew-rate control using capacitive elements
12/02/2004	US20040239390 Structure and method for dynamic control of output driver voltage
12/02/2004	US20040239388 Register controlled delay locked loop with low power consumption
12/02/2004	US20040239387 Digitally controlled delay cells
12/02/2004	US20040239379 Electronic circuit, electronic device and personal computer
12/02/2004	US20040239377 Multi-channel integrated circuit
12/02/2004	US20040239376 Continuously retraining sampler and method of use thereof
12/02/2004	US20040239375 Sensor signal output circuit
12/02/2004	US20040239374 Differential signal receiving device and differential signal transmission system
12/02/2004	US20040239373 Semiconductor laser driving circuit and optical communication apparatus
12/02/2004	US20040239372 RF differential signal squarer/limiter and balancer with high power supply rejection
12/01/2004	EP1481254A1 Dsp assisted peak capture circuit and method
12/01/2004	CN2660787Y Precision delayer
12/01/2004	CN1551181A Timing adjusting apparatus
12/01/2004	CN1550948A 半导体集成电路 The semiconductor integrated circuit
12/01/2004	CN1178391C Clock signal control method and its device
12/01/2004	CN1178388C Timing device and method
11/2004
11/30/2004	US6826247 Digital phase lock loop
11/30/2004	US6825708 Apparatus and method for an offset-correcting sense amplifier
11/30/2004	US6825707 Current mode logic (CML) circuit concept for a variable delay element
11/30/2004	US6825705 Clock signal generation circuit and audio data processing apparatus
11/30/2004	US6825704 Pulse generation circuit enabling its output pulse cycle to be shortened
11/30/2004	US6825701 Power-on reset circuit/method for initializing an integrated circuit
11/30/2004	US6825696 Dual-stage comparator unit
11/30/2004	US6824237 Printhead, head cartridge having said printhead, printing apparatus using said printhead and printhead element substrate
11/30/2004	US6823869 Mask assembly
11/25/2004	WO2004102807A1 Method for stabilizing operation of electronic circuit and its electronic device
11/25/2004	WO2004102805A1 Delay circuit
11/25/2004	WO2004102804A2 Method and apparatus for signal reception using ground termination and/or non-ground termination
11/25/2004	US20040234017 Delay line based multiple frequency generator circuits for CDMA processing
11/25/2004	US20040233982 Apparatus and method for generating pulse based on time delay and wave transform and transmitter of multi-frequency band communication system using the same
11/25/2004	US20040233742 Apparatus and method for adusting clock skew
11/25/2004	US20040233700 Register controlled DLL for reducing current consumption
11/25/2004	US20040233144 Method and apparatus for driving leds
11/25/2004	US20040232970 Level shift circuit
11/25/2004	US20040232967 Clock generation circuit capable of setting or controlling duty ratio of clock signal and system including clock generation circuit
11/25/2004	US20040232966 Multiple clocks with superperiod
11/25/2004	US20040232961 Duty cycle correction circuit of delay locked loop and the delay locked loop having the duty cycle correction circuit
11/25/2004	US20040232955 Clock multiplier
11/25/2004	US20040232954 Signal generator device, method for generating a signal and devices including such a signal generator device
11/25/2004	US20040232895 Low noise fast stable voltage regulator circuit
11/25/2004	DE19843980B4 Schaltungsanordnung zur Unterdrückung von einem digitalen Signal überlagerten Störimpulsen A circuit arrangement for suppression of a digital signal superimposed glitches
11/25/2004	DE10319899A1 Frequency deviation unlocked signal generation procedure uses counters to create pulse signal with length proportional to deviation and detect threshold transgression
11/25/2004	DE10318523A1 Terminating voltage setting method for integrated circuit input stage for maximum reception reliability, involves using control signal dependent on comparing reception signal level(s) with assessment voltage
11/25/2004	DE102004021003A1 Frequenzsynthesizer und zugehöriges Betriebsverfahren Frequency synthesizer and operating method thereof
11/25/2004	DE102004019882A1 Empfänger zum Empfangen eines Amplitudentastungssignals Receiver for receiving a Amplitudentastungssignals
11/25/2004	DE102004014448A1 Vorwärtsentzerrer und Verfahren zum analogen Entzerren eines Datensignals Forward equalizer and method for analog equalizing a data signal

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