| Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714) |
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| 02/17/2005 | US20050035789 Output circuit device for clock signal distribution in high-speed signal transmission |
| 02/17/2005 | US20050035785 Logic circuit and semiconductor integrated circuit |
| 02/17/2005 | DE10354818B3 Clock signal input/output device for clock signal correction e.g. for semiconductor memory device, has frequency divider, signal integrator and two signal receiver circuits coupled to signal restoration circuit |
| 02/17/2005 | DE10344647B3 Dual-rail signal circuit device e.g. for chip card security applications, has dual-rail data input signals with similar values provided as pre-charge signal to obtain dual-rail data output signal having same values |
| 02/17/2005 | DE10332008A1 Elektrische Schaltung sowie Verfahren zum Testen von elktronischen Bauteilen Electrical circuit and method for testing components elktronischen |
| 02/17/2005 | DE10331829A1 Method for generating reference voltage integrates at receiver side clock signal, additionally transmitted to data signal and generates from integrated value reference |
| 02/16/2005 | CN1581861A Break and shortbreak detection circuit |
| 02/16/2005 | CN1581703A Sigma-delta modulator having a clocked delay line |
| 02/16/2005 | CN1581700A Regulation for clock |
| 02/16/2005 | CN1581691A Integrated circuit, method and apparatus for fine tuning clock signals of an integrated circuit |
| 02/16/2005 | CN1581690A Delay circuit and delay sysnchronization loop device |
| 02/16/2005 | CN1581689A Time pulse generating module |
| 02/16/2005 | CN1581360A 逻辑电路和半导体集成电路 A logic circuit and a semiconductor integrated circuit |
| 02/16/2005 | CN1581273A 半导体器件 Semiconductor devices |
| 02/16/2005 | CN1190012C Frequency-multiplying delay locked loop |
| 02/16/2005 | CN1190009C Circuit for receiving input data |
| 02/15/2005 | US6856558 Integrated circuit devices having high precision digital delay lines therein |
| 02/15/2005 | US6856543 Semiconductor integrated circuit device with erasable and programmable fuse memory |
| 02/15/2005 | US6856194 Center of gravity compensation of Class-D amplifier |
| 02/15/2005 | US6856186 Circuit configuration for level boosting, in particular for driving a programmable link |
| 02/15/2005 | US6856184 Clock divider circuit |
| 02/15/2005 | US6856175 Ultrasound transmitter with voltage-controlled rise/fall time variation |
| 02/15/2005 | US6856171 Synchronization of programmable multiplexers and demultiplexers |
| 02/15/2005 | US6856170 Clock signal transmission circuit |
| 02/15/2005 | US6856169 Method and apparatus for signal reception using ground termination and/or non-ground termination |
| 02/15/2005 | US6856166 Status scheme signal processing circuit |
| 02/15/2005 | US6856158 Comparator circuit for semiconductor test system |
| 02/10/2005 | WO2005013489A2 Delay matching for clock distribution in a logic circuit |
| 02/10/2005 | WO2005013486A1 Circuit for producing potentially separated synchronisation impulses from an alternating voltage network |
| 02/10/2005 | WO2005013107A1 Semiconductor device and driving method of semiconductor device |
| 02/10/2005 | WO2004112303A3 Method and apparatus for single burst equalization of single carrier signals in broadband wireless access systems |
| 02/10/2005 | US20050034008 System and method for generating two effective frequencies using a single clock |
| 02/10/2005 | US20050033552 Method for calculating the operating time of hydraulic components |
| 02/10/2005 | US20050030682 Input circuit and method for the operation thereof |
| 02/10/2005 | US20050030275 Apparatus and method for processing signals |
| 02/10/2005 | US20050030206 High-resolution timers and pulse width modulators |
| 02/10/2005 | US20050030110 System and method generating a delayed clock output |
| 02/10/2005 | US20050030092 Active filter circuit with operational amplifier |
| 02/10/2005 | US20050030082 Phase mixer that compensates for frequency variations and PVT a control method thereof |
| 02/10/2005 | US20050030080 Method and circuitry for reducing duty cycle distortion in differential delay lines |
| 02/10/2005 | US20050030079 Delay circuits and related apparatus for extending delay time by active feedback elements |
| 02/10/2005 | US20050030077 Clock control circuit and integrated circuit |
| 02/10/2005 | US20050030076 Distributed delay-locked-based clock and data recovery systems |
| 02/10/2005 | US20050030066 Transition-aware signaling |
| 02/10/2005 | US20050030064 Self-correcting i/o interface driver scheme for memory interface |
| 02/10/2005 | DE10249886B4 Verfahren und Vorrichtung zum Erzeugen eines Taktsignals mit vorbestimmten Taktsingaleigenschaften Method and apparatus for generating a clock signal with predetermined Taktsingaleigenschaften |
| 02/09/2005 | EP1505732A1 Digital clock modulator |
| 02/09/2005 | EP1505479A2 Clock control circuit and integrated circuit |
| 02/09/2005 | CN1578211A Clock signal switching device, clock signal switching method, data bus switching device, and data bus switching method |
| 02/09/2005 | CN1578209A Asynchronous communication circuit |
| 02/09/2005 | CN1578143A 半导体集成电路器件 The semiconductor integrated circuit device |
| 02/09/2005 | CN1577611A Delay locked loop (dll) circuit and method for locking clock delay by using the same |
| 02/09/2005 | CN1577586A Level detection circuit, phase change detection circuit, and optical disk apparatus |
| 02/09/2005 | CN1577340A Time delay computing method, timing analytic method, approximating method for calculating object network and delay control method |
| 02/09/2005 | CN1577207A Semiconductor equipment |
| 02/08/2005 | US6854068 Wander generator having arbitrary TDEV mask characteristic setting apparatus |
| 02/08/2005 | US6853929 Pipeline control for power management |
| 02/08/2005 | US6853510 High-speed low-capacitive load common mode feedback |
| 02/08/2005 | US6853258 Stable oscillator |
| 02/08/2005 | US6853252 Phase-lock loop having programmable bandwidth |
| 02/08/2005 | US6853230 Method and apparatus for producing a clock output signal |
| 02/08/2005 | US6853229 Circuit for transforming a single ended signal into a differential mode signal |
| 02/08/2005 | US6853227 Controller for generating a periodic signal with an adjustable duty cycle |
| 02/08/2005 | US6853226 Register controlled delay locked loop having an acceleration mode |
| 02/08/2005 | US6853225 Delay locked loop circuit with duty cycle correction function |
| 02/08/2005 | US6853223 Phase comparator and clock recovery circuit |
| 02/08/2005 | US6853220 Method and amplification circuit with pre-emphasis |
| 02/08/2005 | US6853177 Semiconductor device with process monitor circuit and test method thereof |
| 02/08/2005 | US6852582 Carbon nanotube gate field effect transistor |
| 02/03/2005 | WO2005011218A1 Cross-over voltage lock for differential output drivers |
| 02/03/2005 | WO2005011118A2 A digital pulse width modulator |
| 02/03/2005 | US20050028055 System and method for reducing waveform distortion in transferring signals |
| 02/03/2005 | US20050025259 Driving apparatus of a light-emitting device |
| 02/03/2005 | US20050025230 Decision feedback equalizers with constrained feedback taps for reduced error propagation |
| 02/03/2005 | US20050025228 Receiver based decision feedback equalization circuitry and techniques |
| 02/03/2005 | US20050024248 Sigma-delta modulator having a clocked delay line |
| 02/03/2005 | US20050024158 Voltage controlled oscillator programmable delay cells |
| 02/03/2005 | US20050024151 Digitally controlled tuner circuit |
| 02/03/2005 | US20050024132 Controller for generating a periodic signal with an adjustable duty cycle |
| 02/03/2005 | US20050024120 Method and apparatus for controlling a dual-slope integrator circuit to eliminate settling time effect |
| 02/03/2005 | US20050024117 Phase interpolator circuitry for reducing clock skew |
| 02/03/2005 | US20050024116 Delay matching for clock distribution in a logic circuit |
| 02/03/2005 | US20050024110 Clock skew tolerant clocking scheme |
| 02/03/2005 | US20050024107 Delay circuit and delay sysnchronization loop device |
| 02/03/2005 | US20050024096 Clock enable buffer for entry of self-refresh mode |
| 02/03/2005 | US20050024095 Low jitter input buffer with small input signal swing |
| 02/03/2005 | US20050024089 Physical layers |
| 02/03/2005 | DE102004011452A1 System und Verfahren zum Auswerten der Geschwindigkeit einer Schaltung System and method for evaluating the speed of a circuit |
| 02/02/2005 | EP1502358A2 A serial to parallel and parallel to serial data transceiver |
| 02/02/2005 | EP1502128A2 Method for assigning a pulse response to one of a plurality of pulse types with different decay times and device for carrying out said method |
| 02/02/2005 | CN1574800A Differential signal receiving device and differential signal transmission system |
| 02/02/2005 | CN1574672A Data transfer apparatus for low voltage differential signaling |
| 02/02/2005 | CN1574646A 电平移动电路 A level shift circuit |
| 02/02/2005 | CN1574642A Spread spectrum clock generating apparatus |
| 02/02/2005 | CN1574641A Spread spectrum clock generator capable of frequency modulation with high accuracy |
| 02/02/2005 | CN1574639A Clock generation circuit capable of setting or controlling duty ratio of clock signal and system including clock generation circuit |
| 02/02/2005 | CN1574633A Transmitter circuit, transmission circuit and driver unit |
| 02/02/2005 | CN1574629A 时钟和数据恢复电路 Clock and data recovery circuit |
| 02/02/2005 | CN1574615A Feedback control system and method |
| 02/02/2005 | CN1574523A Semiconductor laser driving circuit and optical communication apparatus |