Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
07/2005
07/07/2005CA2491119A1 Wideband signal generators, measurement devices, methods of signal generation and methods of signal analysis
07/06/2005EP1550217A2 Method and apparatus to actively sink current in an integrated circuit with a floating i/o supply voltage
07/06/2005EP1550149A2 Constant delay zero standby differential logic receiver and method
07/06/2005CN1636320A Integrated circuit having reduced substate bounce
07/06/2005CN1209875C Buffer capable of regulating duty ratio and its operation method
07/06/2005CN1209872C Pulse peak value keeping circuit
07/05/2005US6915442 Precision-controlled duty cycle clock circuit
07/05/2005US6915222 Semiconductor integrated circuit including waveform-generating circuit having pulsed waveform-generating function
07/05/2005US6915121 Integrated tunable filter for broadband tuner
07/05/2005US6914951 Method and apparatus for a digital logic input signal noise filter
07/05/2005US6914798 Register controlled DLL for reducing current consumption
07/05/2005US6914492 Digital programmable delay scheme with automatic calibration
07/05/2005US6914472 Phase modulating system
07/05/2005US6914471 Method and apparatus for controlling a dual-slope integrator circuit to eliminate settling time effect
07/05/2005US6914469 Clock divider circuit
07/05/2005US6914468 Controllable delay circuit for delaying an electrical signal
07/05/2005US6914467 Dual edge programmable delay unit
07/05/2005US6914460 Counter-based clock doubler circuits and methods
07/05/2005US6914459 Clock multiplier using masked control of clock pulses
07/05/2005US6914451 Adaptive level binary logic
06/2005
06/30/2005WO2005060098A1 Delay circuit and testing apparatus
06/30/2005US20050141662 VCO circuit, Pll circuit using VCO circuit, and data recording apparatus using the Pll circuit
06/30/2005US20050140667 Connection device capable of converting a pixel clock to a character clock
06/30/2005US20050140542 Radar apparatus
06/30/2005US20050140464 Transceiver module with voltage regulation and filtering
06/30/2005US20050140431 Offset, delay and parasitically immune resister-capacitor (rc) tracking loop and method of using same
06/30/2005US20050140427 Comparator circuit and power supply circuit
06/30/2005US20050140425 Current limiting circuit for high-speed low-side driver outputs
06/30/2005US20050140420 Clamping circuit for high-speed low-side driver outputs
06/30/2005US20050140417 Variable-delay signal generators and methods of operation therefor
06/30/2005US20050140416 Programmable direct interpolating delay locked loop
06/30/2005US20050140415 Timing circuit for separate positive and negative edge placement in a switching DC-DC converter
06/30/2005US20050140414 Delay circuit and display including the same
06/30/2005US20050140413 Driving device using CMOS inverter
06/30/2005US20050140410 Circuit for modifying a clock signal to achieve a predetermined duty cycle
06/30/2005US20050140403 Internal clock doubler
06/30/2005US20050140398 Clock switching circuit
06/30/2005US20050140396 Detecting peak signals
06/30/2005US20050140395 Overvoltage detector
06/30/2005US20050140309 Driving circuit, driving method , and plasma display device
06/30/2005US20050139931 Analog switch
06/30/2005DE4300984B4 Bootstrap-MOSFET-Abtastschaltstufe Bootstrap MOSFET Abtastschaltstufe
06/30/2005DE10354215A1 Taktregulierungsvorrichtung sowie Schaltungsanordnung Clock regulation apparatus and circuitry
06/30/2005DE102004056067A1 Semiconductor integrated circuit device e.g. flash memory device, has control circuit to control isolation circuit to isolate sense amplifier circuit from data lines, where high voltage on lines is not applied to amplifier circuit
06/29/2005EP1547127A2 Clock distributor circuit for maintaining a phase relationship between remote operating nodes and a reference clock on a chip
06/29/2005EP1090455B1 Crystal oscillator with controlled duty cycle
06/28/2005US6912666 Interleaved delay line for phase locked and delay locked loops
06/28/2005US6912250 System and methods for precursor cancellation of intersymbol interference in a receiver
06/28/2005US6911858 Comparator with offset canceling function and D/A conversion apparatus with offset canceling function
06/28/2005US6911857 Current controlled delay circuit
06/28/2005US6911856 Delay matching for clock distribution in a logic circuit
06/28/2005US6911854 Clock skew tolerant clocking scheme
06/28/2005US6911849 Chopper type comparator having input voltage conversion circuit outputting converted input voltage lower than withstand voltage of inverter
06/23/2005WO2005057801A2 Low-power mixed-mode echo/crosstalk cancellation in wireline communications
06/23/2005WO2005057786A1 A freqency multiplier
06/23/2005WO2005034371A3 Adaptive per-pair skew compensation method for extended reach differential transmission
06/23/2005WO2005006551A3 Self-aligning data path converter for multiple clock systems
06/23/2005US20050138577 Method, apparatus, and article of manufacture for manufacturing high frequency balanced circuits
06/23/2005US20050138094 Triggered DDS pulse generator architecture
06/23/2005US20050135472 Adaptive equalizer, decoding device, and error detecting device
06/23/2005US20050135430 Temperature compensated delay signals
06/23/2005US20050135290 WLAN header detection in analog radio front end
06/23/2005US20050134361 Adaptive body bias for clock skew compensation
06/23/2005US20050134353 Semiconductor integrated circuit and manufacturing method
06/23/2005US20050134352 Pulse output circuit, driving circuit for display device and display device using the pulse output circuit, and pulse output method
06/23/2005US20050134351 Delay adjustment circuit, integrated circuit device, and delay adjustment method
06/23/2005US20050134348 Delay matching for clock distribution in a logic circuit
06/23/2005US20050134346 Reset ramp control
06/23/2005US20050134345 Reset initialization
06/23/2005US20050134342 Circuit and method for generating a signal pulse
06/23/2005US20050134341 Duty cycle correcting circuits having a variable gain and methods of operating the same
06/23/2005US20050134327 High Speed signal level detector
06/23/2005US20050134326 Voltage detection circuit, semiconductor device, method for controlling voltage detection circuit
06/23/2005US20050134325 Shift register and driving method thereof
06/23/2005US20050134324 Variable threshold comparator interface circuit
06/23/2005US20050134323 Single event transient filter for comparator
06/23/2005US20050134319 Logic circuit
06/23/2005US20050134249 Circuit arrangement for regulating the duty cycle of electrical signal
06/23/2005US20050134244 Pulse width modulation controller with double pulse immunity
06/23/2005US20050134243 Self-limiting pulse width modulation regulator
06/23/2005US20050134200 Load control circuit
06/23/2005US20050133603 Integrated circuit comprising a clock generator, a chip card comprising one such integrated circuit and the associated clock generation method
06/22/2005EP1545001A2 Radar apparatus
06/22/2005EP1545000A1 Circuit for regulating the duty cycle of an electrical signal
06/22/2005EP1488507A4 An arbitrary waveform synthesizer using a free-running ring oscillator
06/22/2005EP1212829B1 Method and apparatus for automatically compensating a spread spectrum clock generator
06/22/2005CN2705950Y Noise wiping circuit
06/22/2005CN1630190A Delay adjustment circuit, integrated circuit device, and delay adjustment method
06/22/2005CN1629965A Information processing apparatus
06/22/2005CN1629913A Display device having an improved voltage level converter circuit
06/21/2005US6909672 Time-to-voltage converter
06/21/2005US6909628 High density magnetic RAM and array architecture using a one transistor, one diode, and one MTJ cell
06/21/2005US6909317 Clock control circuit and method
06/21/2005US6909312 Synchronization circuit and synchronization method
06/21/2005US6909311 Methods and apparatus for synthesizing a clock signal
06/16/2005WO2005034388A3 Determination of gain factors for wireless communication power
06/16/2005WO2004070987B1 Analog floating gate voltage sense during dual conduction programming
06/16/2005WO2004046652A3 Device and method for detecting anomolies in a wire and related sensing methods
06/16/2005US20050129143 Channel equalizing device and method of digital broadcasting receiving system
06/16/2005US20050129107 Equalizer/foward error correction automatic mode selector
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