H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass

Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
11/2004
11/25/2004	DE102004010836A1 Schaltung zum Transformieren eines asymmetrischen Signals in ein Differenzsignal A circuit for transforming an unbalanced signal into a differential signal
11/24/2004	EP1480343A1 Level shift circuit
11/24/2004	EP1479164A1 Integrated circuit having reduced substrate bounce
11/24/2004	EP1051805A4 Self-calibrating programmable phase shifter
11/24/2004	CN1550065A Circuit arrangement for generating non-overlapping clock phases
11/24/2004	CN1549345A Pipeline control for power management
11/23/2004	US6823019 Reduced DC transients in a sigma delta filter
11/23/2004	US6822922 Clock synchronous circuit
11/23/2004	US6822599 Integrated circuit and A/D conversion circuit
11/23/2004	US6822506 Amplitude and rise-time sensitive timing-shaping filters with built-in pulse-tail cancellation for high count-rate operation
11/23/2004	US6822505 Mobility compensation in MOS integrated circuits
11/23/2004	US6822504 Correction circuit for generating a control signal for correcting a characteristic change of a transistor, a delay circuit using the same, and a ring oscillator circuit using the same
11/23/2004	US6822501 Apparatus for correcting offset voltage
11/23/2004	US6822499 Clock modulating circuit
11/23/2004	US6822496 Integrated circuit device implementing 90-degree phase shifter capable of generating output signals having phase difference therebetween at improved accuracy
11/23/2004	US6822435 Comparator circuit for differential swing comparison and common-mode voltage comparison
11/18/2004	WO2004100473A2 Signal isolators using micro-transformers
11/18/2004	WO2004100377A1 Clamping circuit to counter parasitic coupling
11/18/2004	WO2004100374A2 Time delay apparatus and method of using same
11/18/2004	WO2004100373A1 Enabling method to prevent glitches in waveform
11/18/2004	WO2004100372A1 Circuit and method for generating timing
11/18/2004	US20040228398 Method and circuit for updating a tap coefficient of a channel equalizer
11/18/2004	US20040228397 Method and apparatus for implementation of a zero forcing equalizer
11/18/2004	US20040227556 High-Voltage Input Tolerant Receiver
11/18/2004	US20040227554 Amplifier circuit with output delay selectively changed according to common mode voltage level, associated replica delay circuit and internal clock generator
11/18/2004	US20040227553 Reliable phase adjustment circuit
11/18/2004	US20040227545 Method and apparatus to remotely sense the temperature of a power semiconductor
11/18/2004	DE10297489T5 Phasenanpassungsvorrichtung und Halbleiterspeicher-Testvorrichtung Phase adjusting device and semiconductor memory test apparatus
11/17/2004	EP1476945A2 Method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time
11/17/2004	EP1476872A1 Extraction of a binary code from physical parameters of an integrated circuit
11/17/2004	EP0880844B1 Current distribution circuit having an additional parallel dc-current sinking branch
11/17/2004	CN1547321A Circuit converting sinusoidal signal of coder to bar signal of 1:1 duty ratio
11/17/2004	CN1547320A Half rate time sequence data replying device
11/17/2004	CN1176522C Input filtering stage and method for data stream
11/16/2004	US6819729 Digital PLL pulse generating apparatus
11/16/2004	US6819626 Semiconductor integrated circuit device
11/16/2004	US6819190 Robust fractional clock-based pulse generator for digital pulse width modulator
11/16/2004	US6819181 Method and structure for integrated circuit interference isolation enhancement
11/16/2004	US6819155 High-speed duty cycle control circuit
11/16/2004	US6819153 Semiconductor device for clock signals synchronization accuracy
11/16/2004	US6819146 Data receiver and data receiving method using signal integration
11/16/2004	US6819145 High speed differential pre-driver using common mode pre-charge
11/16/2004	US6819144 Latched sense amplifier with full range differential input voltage
11/16/2004	US6819139 Skew-free dual rail bus driver
11/11/2004	WO2004098056A2 Input stage of a signal-processing unit
11/11/2004	WO2004098055A1 Oscillator assembly and method for producing a multi-frequency output signal
11/11/2004	WO2004034440A3 Current integrating sense amplifier for memory modules in rfid
11/11/2004	WO2004034404A9 Use of analog-valued floating-gate transistors to match the electrical characteristics of interleaved and pipelined
11/11/2004	WO2003058822A9 Input circuit and method for the operation thereof
11/11/2004	US20040225976 Glitch free programmable delay line for edge sensitive design
11/11/2004	US20040224490 Apparatus and manufacturing process of carbon nanotube gate field effect transistor
11/11/2004	US20040223571 Delay locked loop circuitry for clock delay adjustment
11/11/2004	US20040223562 Linear derivative equalizer, and associated method, for a radio communication system
11/11/2004	US20040223559 Integrated data jitter generator for the testing of high-speed serial interfaces
11/11/2004	US20040223542 Reset scheme for I/O pads in a source synchronous system
11/11/2004	US20040223274 Switching circuit device
11/11/2004	US20040222866 Digital pulse width modulation
11/11/2004	US20040222842 Systems and methods for generating a reference voltage
11/11/2004	US20040222836 Clock gater circuit and associated method
11/11/2004	US20040222835 Mechanism for combining signals to provide consistent output behavior
11/11/2004	US20040222834 Method and apparatus for signal reception using ground termination and/or non-ground termination
11/11/2004	US20040222831 Synchronization circuit and synchronization method
11/11/2004	US20040222828 Timing adjustment circuit and semiconductor device including the same
11/11/2004	US20040222823 Overvoltage detector
11/11/2004	US20040222822 Low jitter high speed CMOS to CML clock converter
11/11/2004	US20040222819 General purpose delay logic
11/11/2004	US20040222811 Integrated module having a delay element
11/10/2004	EP1474868A1 Method and arrangement for performing triggering and timing of triggering
11/10/2004	EP1474805A2 Methods and apparatus for adaptively adjusting a data receiver
11/10/2004	EP0920579B1 Device for the recognition of a defective signal
11/10/2004	CN1545762A Compensating for differences between clock signals
11/10/2004	CN1545760A Semiconductor integrated circuit
11/10/2004	CN1545208A DC offset cancellation circuit, differential amplification circuit with DC offset cancellation circuit and photo-electric pulse conversion circuit
11/10/2004	CN1175572C Clock signal control circuit and method and synchronous delay circuit
11/10/2004	CN1175571C Delay circuit, clock generating circuit and phase synchronized circuit
11/10/2004	CN1175570C Circuit arrangement for generating current impulses in supply current of integrated circuits
11/10/2004	CN1175568C Output cadence integrated circuit with phase displacement produced by cadence signal
11/09/2004	US6816353 Electronic actuation for mechanically held contactors
11/09/2004	US6816020 Electronic circuitry
11/09/2004	US6815994 Method of scaling digital circuits and controlling the timing relationship between digital circuits
11/09/2004	US6815991 Clock frequency multiplier
11/09/2004	US6815990 Delay locked loops having blocking circuits therein that enhance phase jitter immunity and methods of operating same
11/09/2004	US6815989 Sequential activation delay line circuits and methods
11/09/2004	US6815983 Analog floating gate voltage sense during dual conduction programming
11/09/2004	US6815944 Method and apparatus for providing information from a speed and direction sensor
11/04/2004	WO2004095240A2 A method and apparatus for detecting on-die voltage variations
11/04/2004	WO2004081978A3 Radio frequency clamping circuit
11/04/2004	WO2004068711A3 Comparator and method for operating the comparator
11/04/2004	WO2004068706A3 Programmable dual-edge triggered counter
11/04/2004	WO2004055988A3 Coarse delay tuner circuits with edge suppressors in delay locked loops
11/04/2004	WO2003060557A3 Method for assigning a pulse response to one of a plurality of pulse types with different decay times and device for carrying out said method
11/04/2004	US20040221078 Programmable state machine interface
11/04/2004	US20040220757 Pipeline control for power management
11/04/2004	US20040218704 Timing adjusting apparatus
11/04/2004	US20040218700 Digital implementation of multi-channel demodulators
11/04/2004	US20040218694 Receiver
11/04/2004	US20040218035 Mixed-media telecommunication call set-up
11/04/2004	US20040217933 Active matrix display device
11/04/2004	US20040217796 Enabling method to prevent glitches in waveform of arbitrary phase
11/04/2004	US20040217795 Delay adjusting apparatus providing different delay times by producing a plurality of delay control signals

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