Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
11/2005
11/24/2005DE102005016299A1 Tastverhältniskorrektur Tastverhältniskorrektur
11/24/2005DE102004021398A1 Verfahren und Schaltungsanordnung zum Zurücksetzen einer integrierten Schaltung Method and circuit for resetting an integrated circuit
11/23/2005EP1598937A2 Circuit with at least one delay cell
11/23/2005EP1598802A2 Capacitive load driving circuit for driving capacitive loads such as pixels in a plasma display panel, and plasma display apparatus
11/23/2005CN1700590A Wideband signal generators, measurement devices, methods of signal generation, and methods of signal analysis
11/23/2005CN1228918C Multiphase clock transfer circuit and method
11/23/2005CN1228916C Oscillator and electronic instrument using same
11/23/2005CN1228848C Electronic circuit and semiconductor memory
11/22/2005US6968157 System and method for protecting devices from interference signals
11/22/2005US6967523 Cascaded charge pump power supply with different gate oxide thickness transistors
11/22/2005US6967516 Semiconductor testing apparatus with a variable delay circuit
11/22/2005US6967515 Single-ended to differential conversion circuit with duty cycle correction
11/22/2005US6967514 Method and apparatus for digital duty cycle adjustment
11/22/2005US6967512 Multiphase-clock processing circuit and clock multiplying circuit
11/22/2005US6967511 Method for synchronizing and resetting clock signals supplied to multiple programmable analog blocks
11/22/2005US6967503 Comparator
11/17/2005WO2005109720A2 Reconfigurable chip level equalizer architecture for multiple antenna systems
11/17/2005WO2005109647A2 Adjustable frequency delay-locked loop
11/17/2005WO2005109643A1 Frequency synthesizer and method
11/17/2005WO2005109642A1 Equiphase polyphase clock signal generator circuit and serial digital data receiver circuit using the same
11/17/2005WO2005109628A1 A tuneable circuit for canceling third order modulation
11/17/2005US20050256921 Delay calculation method, timing analysis method, calculation object network approximation method, and delay control method
11/17/2005US20050254612 Data transmission system, controller, and its method
11/17/2005US20050254572 Architecture for feedback loops in decision feedback equalizers
11/17/2005US20050254571 Decision feedback equalizer design with interference removal and reduced error propagation
11/17/2005US20050254569 System and method for generating equalization coefficients
11/17/2005US20050254568 Equalizer mode switch
11/17/2005US20050254564 Graphic equalizers
11/17/2005US20050253649 Class-D amplifier
11/17/2005US20050253641 Circuit with at least one delay cell
11/17/2005US20050253638 Method and circuit arrangement for resetting an integrated circuit
11/17/2005US20050253637 Duty-cycle correction circuit
11/17/2005US20050253635 History-based slew rate control to reduce intersymbol interference
11/17/2005US20050253632 Low-power direct digital synthesizer with analog interpolation
11/17/2005US20050253629 Input buffer with automatic switching point adjustment circuitry, and synchronous dram device including same
11/17/2005DE10338303B4 Schaltungsanordnung zur Verteilung eines Eingangssignals in eine oder mehrere Zeitpositionen A circuit arrangement for distributing an input signal into one or several time positions
11/17/2005DE102005013870A1 Adaptive-Hysterese-Empfänger für ein digitales Hochgeschwindigkeitssignal Adaptive hysteresis receiver for a high-speed digital signal
11/17/2005DE102005001126A1 Begrenzungskastensignal-Detektor Bounding box Signal Detector
11/17/2005DE102004010852A1 IC with normal operation and configuration operation has the clocking signal derived from the external power supply feed
11/17/2005CA2566491A1 A tuneable circuit for canceling third order modulation
11/16/2005EP1596526A2 Data transmission system, controller, and its method
11/16/2005EP1596219A1 Signal processing circuit for time delay determination
11/16/2005EP1595201A2 System and method for calibrating the clock frequency of a clock generator unit over a data line
11/16/2005EP1537668A4 Synchronous mirror delay (smd) circuit and method including a ring oscillator for timing coarse and fine delay intervals
11/16/2005EP1532737A4 Synchronous mirror delay (smd) circuit and method including a counter and reduced size bi-directional delay line
11/16/2005EP1240692A4 High speed magnetic modulator voltage and temperature timing compensation circuit
11/16/2005CN1698269A Waveform shaping circuit
11/16/2005CN1696738A Signal processing circuit
11/16/2005CN1227814C Switching aid circuit for a logic circuit
11/15/2005US6965337 Reference generator
11/15/2005US6965273 Oscillator with improved parameters variation tolerance
11/15/2005US6965260 System and method for increasing effective pulse-width modulated drive signal resolution and converter controller incorporating the same
11/15/2005US6965259 Clock controlling method and circuit
11/15/2005US6965257 Multistage level discrimination circuit
11/15/2005US6965255 Method and apparatus for amplifying a regulated differential signal to a higher voltage
11/10/2005US20050251352 Measurement interface optimized for both differential and single-ended inputs
11/10/2005US20050249275 Timing recovery method and device for combining pre-filtering and feed-forward equalizing functions
11/10/2005US20050249273 Method and apparatus for generating filter tap weights and biases for signal dependent branch metric computation
11/10/2005US20050249272 Dynamic range control and equalization of digital audio using warped processing
11/10/2005US20050248997 Semiconductor memory device for controlling output timing of data depending on frequency variation
11/10/2005US20050248415 Ring oscillator circuit
11/10/2005US20050248414 Delay line for a ring oscillator circuit
11/10/2005US20050248393 Noise cancellation circuits and methods
11/10/2005US20050248392 Low supply voltage bias circuit, semiconductor device, wafer and systemn including same, and method of generating a bias reference
11/10/2005US20050248378 Method of generating a pulsed output signal from a periodic ramp signal and a reference voltage, and a switch mode power converter
11/10/2005US20050248369 Signal detection circuit and signal detection method
11/10/2005DE10352191B4 Verfahren und Anordnung zur Wandlung von optischen Empfangsimpulsen in elektrische Ausgangsimpulse Method and apparatus for converting optical receiving pulses into electrical output pulses
11/10/2005DE10342056B4 Additionsschaltung für Sigma-Delta-Modulatorschaltungen Addition circuit for sigma-delta-modulator circuits
11/10/2005DE102005004807A1 Taktverdoppler Clock doubler
11/10/2005DE10100160B4 Impulserzeugungsschaltung und Treiberschaltung Pulse generating circuit and driver circuit
11/09/2005EP1594230A1 Switched capacitance circuit
11/09/2005EP1593199A2 Adaptive input logic for phase adjustments
11/09/2005CN1695305A Synchronous mirror delay (SMD) circuit and method including a ring oscillator for timing coarse and fine delay intervals
11/09/2005CN1694350A Class-D amplifier
11/09/2005CN1694241A Method and circuit arrangement for resetting an integrated circuit
11/09/2005CN1226888C Block interpolating filter structure using seeking table
11/08/2005US6963251 High noise rejection voltage-controlled ring oscillator architecture
11/08/2005US6963238 Level shift circuit
11/08/2005US6963237 Output circuit device for clock signal distribution in high-speed signal transmission
11/08/2005US6963236 Method and apparatus for generating and controlling a quadrature clock
11/08/2005US6963235 Delay locked loop circuit with duty cycle correction function
11/08/2005US6962839 Apparatus and manufacturing process of carbon nanotube gate field effect transistor
11/03/2005WO2005104388A2 System for synchronizing a portable transceiver to a network
11/03/2005WO2005104368A1 Jitter generating circuit
11/03/2005WO2005103739A1 Method and device for measuring with synchronous detection and correlated sampling
11/03/2005WO2005101959A2 Dynamic range control and equalization of digital audio using warped processing
11/03/2005US20050246596 Auto-calibration method for delay circuit
11/03/2005US20050246555 Transition detection at input of integrated circuit device
11/03/2005US20050246141 Multiphase waveform generator capable of performing phase calibration and related phase calibration method
11/03/2005US20050246140 Method and apparatus for signal processing in a sensor system for use in spectroscopy
11/03/2005US20050246118 Method of optimizing the timing between signals
11/03/2005US20050245993 Systems and methods for providing amplitude selection for pulse generation
11/03/2005US20050245978 Systems and methods for precharging circuitry for pulse generation
11/03/2005US20050245977 Voltage limited systems and methods
11/03/2005US20050243955 Reconfigurable chip level equalizer architecture for multiple antenna systems
11/03/2005US20050243945 Method for generating a signal with a definable pulse shape
11/03/2005US20050243908 Decision feedback equalizer
11/03/2005US20050243905 Bounding box signal detector
11/03/2005US20050243894 Methods and circuits for frequency modulation that reduce the spectral noise of switching regulators
11/03/2005US20050242870 Reference voltage generating circuit
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