Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
12/2005
12/13/2005US6975139 Scalable non-blocking switching network for programmable logic
12/13/2005US6975138 Method and apparatus for universal program controlled bus architecture
12/13/2005US6975137 Programmable logic devices with integrated standard-cell logic blocks
12/13/2005US6975135 Universally programmable output buffer
12/13/2005US6975134 Buffer/driver circuits
12/13/2005US6975133 Logic circuits having linear and cellular gate transistors
12/08/2005WO2005117263A2 High speed clock distribution transmission line network
12/08/2005WO2005117262A1 Optically rearrangeable logic circuit
12/08/2005WO2005117261A1 Pull up for high speed structures
12/08/2005WO2005117144A2 Gate driver output stage with bias circuit for high and wide operating voltage range
12/08/2005WO2005117127A1 Quantum device, quantum logic device, method of driving quantum logic device, and logic circuit by quantum logic device
12/08/2005WO2005116879A2 Apparatus and methods for adjusting performance of programmable logic devices
12/08/2005WO2005116878A2 Apparatus and methods for adjusting performance of integrated circuits
12/08/2005US20050273750 Turn architecture for routing resources in a field programmable gate array
12/08/2005US20050272197 Semiconductor device
12/08/2005US20050270823 Standard cell, semiconductor integrated circuit device of standard cell scheme and layout design method for semiconductor integrated circuit device
12/08/2005US20050270082 Receiver and method for mitigating temporary logic transitions
12/08/2005US20050270080 Level shift circuit, display apparatus, and portable terminal
12/08/2005US20050270079 Input buffer structure with single gate oxide
12/08/2005US20050270074 Power-gating system and method for integrated circuit devices
12/08/2005US20050270070 Repeater circuit with high performance repeater mode and normal repeater mode
12/08/2005US20050270069 Repeater circuit having different operating and reset voltage ranges, and methods thereof
12/08/2005US20050270068 Circuits and methods for detecting and assisting wire transitions
12/08/2005US20050270067 Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability
12/08/2005US20050270066 Level shifter and buffer circuit
12/08/2005US20050270065 Coms buffer having higher and lower voltage operation
12/08/2005US20050270064 Semiconductor device
12/08/2005US20050270063 Method for portable PLC configurations
12/08/2005US20050270062 System for portable PLC configurations
12/08/2005US20050270061 Configurable logic circuit
12/08/2005US20050270060 A configurable integrated circuit for use in a multi-function handheld device
12/08/2005DE102004025386A1 Schaltung mit wenigstens einer Verzögerungszelle Circuit with at least one delay cell
12/07/2005EP1603242A1 Logical operation element using field-emission micro electron emitter and logical operation circuit
12/07/2005EP1603241A2 Redundancy structures and methods in a programmable logic device
12/07/2005EP1603240A2 Switch methodology for mask-programmable logic devices
12/07/2005EP1603239A1 A voltage tolerant input protection circuit for buffer
12/07/2005EP1603238A1 Inhibition circuit with hysterisis and low consumption
12/07/2005EP1602110A1 Magnetic logic system
12/07/2005EP1317828B1 System and method for actively terminating a transmission line
12/07/2005CN1705042A Shift register
12/07/2005CN1230986C Integrated circuit device of reducing mixed signal shiver
12/07/2005CN1230725C Simplification of interface of transmitting/receiving device
12/06/2005US6973634 IC layouts with at least one layer that has more than one preferred interconnect direction, and method and apparatus for generating such a layout
12/06/2005US6973629 Circuit arrangement
12/06/2005US6973608 Fault tolerant operation of field programmable gate arrays
12/06/2005US6972986 Combination field programmable gate array allowing dynamic reprogrammability and non-votatile programmability based upon transistor gate oxide breakdown
12/06/2005US6972607 Clock signal regeneration circuitry
12/06/2005US6972605 High speed semi-dynamic flip-flop circuit
12/06/2005US6972599 Pseudo CMOS dynamic logic with delayed clocks
12/06/2005US6972598 Methods and arrangements for an enhanced scanable latch circuit
12/06/2005US6972597 Simultaneous bidirectional input/output circuit and method
12/06/2005US6972596 Method and apparatus for amplifying capacitively coupled inter-chip communication signals
12/06/2005US6972595 Electrical circuit
12/06/2005US6972593 Method and apparatus for protecting a circuit during a hot socket condition
12/06/2005US6972591 Semiconductor integrated circuit device having a semiconductor device with a modulatable gain coefficient
12/06/2005US6972589 Method for rapidly propagating a fast edge of an output signal through a skewed logic device
12/06/2005US6972588 Adjustable differential input and output drivers
12/01/2005WO2005114840A2 Mems waveform generator and adiabatic logic circuits using the same
12/01/2005WO2005114668A2 Systems and methods for write protection of non-volatile memory devices
12/01/2005WO2005114667A2 Internal voltage generator scheme and power management method
12/01/2005US20050268191 Semiconductor integrated circuit device having scan flip-flop circuit
12/01/2005US20050268125 Logic circuit apparatus
12/01/2005US20050267699 Time constant based fixed parameter assignment
12/01/2005US20050265089 High reliability triple redundant latch with voting logic on each storage node
12/01/2005US20050264971 Semiconductor integrated circuit apparatus having overheat protection circuit and overheat protection method
12/01/2005US20050264514 Shift register
12/01/2005US20050264513 Shift resistor circuit and method of operating the same
12/01/2005US20050264344 Precharged power-down biasing circuit
12/01/2005US20050264334 Semiconductor integrated circuit using latch circuit with noise tolerance
12/01/2005US20050264328 Reset circuitry for an integrated circuit
12/01/2005US20050264322 SOI sense amplifier with pre-charge
12/01/2005US20050264321 Current mode logic buffer
12/01/2005US20050264320 Logic circuits having linear and cellular gate transistors
12/01/2005US20050264319 Low voltage high-speed differential logic devices and method of use thereof
12/01/2005US20050264318 Redundancy structures and methods in a programmable logic device
12/01/2005US20050264317 Dynamic programmable logic array having enable unit
12/01/2005US20050264316 Bus controller
12/01/2005DE102004020188A1 Process to produce a digital output signal gives signal level above permitted voltage of output transistors and uses logic voltage level control between two values
11/2005
11/30/2005EP1599941A2 Fpga architecture with mixed interconnect resources
11/30/2005EP1599940A1 Integrated digital circuit comprising a non-volatile storage element
11/30/2005CN1702968A Semiconductor integrated circuit device having scan flip-flop circuit
11/30/2005CN1702639A Transmission circuit, data-transfer control device and electronic equipment
11/29/2005US6970391 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions
11/29/2005US6970369 Memory device
11/29/2005US6970036 Semiconductor integrated circuit device
11/29/2005US6970034 Method and apparatus for reducing power consumption due to gate leakage during sleep mode
11/29/2005US6970032 Power supply detecting input receiver circuit and method
11/29/2005US6970024 Over-voltage protection of integrated circuit I/O pins
11/29/2005US6970019 Semiconductor integrated circuit device having power reduction mechanism
11/29/2005US6970015 Apparatus and method for a programmable trip point in an I/O circuit using a pre-driver
11/29/2005US6970014 Routing architecture for a programmable logic device
11/29/2005US6970013 Variable data width converter
11/29/2005US6970012 Programmable logic device having heterogeneous programmable logic blocks
11/29/2005US6970011 Partial termination voltage current shunting
11/29/2005US6970010 Apparatus and method for power efficient line driver
11/24/2005WO2005112272A1 Method and apparatus for digit-serial communications for iterative digital processing algorithms
11/24/2005WO2005112264A1 Architecture and methods for computing with nanometer scale reconfigurable resistor crossbar switches
11/24/2005WO2005112263A2 Low swing current mode logic family
11/24/2005WO2005111842A1 Dynamic reconfiguration
11/24/2005WO2005086746A3 Programmable-logic acceleraton of data processing applications
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