| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 01/05/2006 | US20060001452 Ratioed logic circuits with contention interrupt |
| 01/05/2006 | US20060001451 Dynamic-to-static logic converter |
| 01/05/2006 | US20060001450 Method, apparatus and system of domino multiplexing |
| 01/05/2006 | US20060001449 Voltage level translator circuit |
| 01/05/2006 | US20060001448 Input buffer with wide input voltage range |
| 01/05/2006 | US20060001447 Level shifting circuit between isolated systems |
| 01/05/2006 | US20060001446 Duty cycle controlled CML-CMOS converter |
| 01/05/2006 | US20060001445 Programmable logic block for designing an asynchronous circuit |
| 01/05/2006 | US20060001444 Application-specific integrated circuit equivalents of programmable logic and associated methods |
| 01/05/2006 | US20060001443 High speed memory modules utilizing on-pin capacitors |
| 01/05/2006 | US20060001442 Single event upset immune keeper circuit and method for dual redundant dynamic logic |
| 01/05/2006 | US20060001049 Service programmable logic arrays with low tunnel barrier interpoly insulators |
| 01/05/2006 | US20060001047 Integrated circuit well bias circuitry |
| 01/04/2006 | EP1612941A1 Power level converter circuit |
| 01/04/2006 | EP1612940A2 Application-specific integrated circuit equivalents of programmable logic and associated methods |
| 01/04/2006 | EP1612799A2 Protection for input buffers of flash memories |
| 01/04/2006 | EP1612762A2 Semiconductor integrated circuit, drive circuit, and plasma display apparatus |
| 01/04/2006 | EP1612693A1 Reconfigurable processor and semiconductor device |
| 01/04/2006 | EP1611414A2 Method and apparatus for system management using codebook correlation with symptom exclusion |
| 01/04/2006 | CN2750476Y Circuit realizing chip pin function switching and chip |
| 01/04/2006 | CN1717589A System and method for keeping constant logic value scan test during constant working process |
| 01/04/2006 | CN1716781A Application-specific integrated circuit equivalents of programmable logic and associated methods |
| 01/04/2006 | CN1716780A Shift buffer memory driving circuit and its level shift device |
| 01/04/2006 | CN1716779A Quasi displacement circuit capable of preventing static discharging |
| 01/04/2006 | CN1716778A Shift temporary storage and shift temporary storage group using it |
| 01/04/2006 | CN1716568A Switch methodology for mask-programmable logic devices |
| 01/04/2006 | CN1235158C Dynamic latch receiver with automatic reset pointer |
| 01/04/2006 | CN1235117C IC device with power control logic circuit and operation method thereof |
| 01/03/2006 | US6983441 Embedding a JTAG host controller into an FPGA design |
| 01/03/2006 | US6983383 Method for providing priority to an ac adaptor if the input to the ac adaptor is above a predetermined value even if the power supply via an interface is present |
| 01/03/2006 | US6982891 Re-configurable content addressable/dual port memory |
| 01/03/2006 | US6982597 Differential input circuit |
| 01/03/2006 | US6982583 Current-controlled CMOS circuit using higher voltage supply in low voltage CMOS process |
| 01/03/2006 | US6982572 Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges, circuits and systems including same |
| 01/03/2006 | US6982571 Systems and methods for translating voltage levels of digital signals |
| 01/03/2006 | US6982570 Reconfigurable device |
| 12/29/2005 | WO2005125014A1 Programmable semiconductor device |
| 12/29/2005 | WO2005125013A1 Optically reconfigurable gate array write state inspection method, write state inspection device, and optically reconfigurable gate array |
| 12/29/2005 | WO2005125012A1 Adaptive control of power supply for integrated circuits |
| 12/29/2005 | WO2005124674A1 Voltage-controlled computing element for quantum computer |
| 12/29/2005 | WO2005124481A1 A method for portable plc configurations |
| 12/29/2005 | WO2005124480A1 Control scheme for binary control of a performance parameter |
| 12/29/2005 | US20050289496 Symmetric signal distribution through abutment connection |
| 12/29/2005 | US20050286333 High-voltage tolerant input buffer circuit |
| 12/29/2005 | US20050286187 Esd preventing-able level shifters |
| 12/29/2005 | US20050285819 Semiconductor integrated circuit, drive circuit, and plasma display apparatus |
| 12/29/2005 | US20050285659 Semiconductor device |
| 12/29/2005 | US20050285651 Ultra-drowsy circuit |
| 12/29/2005 | US20050285650 Fast bistable circuit protected against random events |
| 12/29/2005 | US20050285648 Closed-loop independent DLL-controlled rise/fall time control circuit |
| 12/29/2005 | US20050285646 Closed-loop control of driver slew rate |
| 12/29/2005 | US20050285637 CMOS LvPECL driver with output level control |
| 12/29/2005 | US20050285632 Fail-safe method and circuit |
| 12/29/2005 | US20050285630 Multiple-output transistor logic circuit |
| 12/29/2005 | US20050285629 Multiple signal format output buffer |
| 12/29/2005 | US20050285628 Charge recycling power gate |
| 12/29/2005 | US20050285627 Input enable/disable circuit |
| 12/29/2005 | US20050285625 Semiconductor device, driving method thereof and electronic device |
| 12/29/2005 | US20050285624 Hybrid pass gate level converting dual supply sequential circuit |
| 12/29/2005 | US20050285623 Low-leakage level shifter with integrated firewall and method |
| 12/29/2005 | US20050285622 Logic basic cell |
| 12/29/2005 | US20050285621 Adaptive termination for optimum signal detection |
| 12/29/2005 | US20050285620 Leakage testing for differential signal transceiver |
| 12/29/2005 | US20050285113 Display device |
| 12/29/2005 | DE102005010056A1 Rücksetzschaltungsanordnung für eine integrierte Schaltung Reset circuitry for an integrated circuit |
| 12/29/2005 | DE102004063926A1 Konfigurierbare Treiberzelle eines logischen Zellenfeldes Configurable driver cell of a logic cell array |
| 12/29/2005 | DE102004027372A1 DPA-resistente konfigurierbare Logikschaltung DPA-resistant configurable logic circuit |
| 12/29/2005 | CA2570354A1 Voltage-controlled computing element for quantum computer |
| 12/28/2005 | EP1610292A2 Display device, driving method thereof and electronic device |
| 12/28/2005 | EP1610225A2 Apparatus and method for topography dependent signaling |
| 12/28/2005 | EP1177631B1 Heterogeneous programmable gate array |
| 12/28/2005 | CN1713527A Crystal oscillation duplicaltion and its duplicating circuit |
| 12/28/2005 | CN1713266A Display device |
| 12/28/2005 | CN1234207C Level charging circuit |
| 12/27/2005 | US6981237 Command user interface with programmable decoder |
| 12/27/2005 | US6981189 Interface circuit |
| 12/27/2005 | US6981167 Programmable controller with sub-phase clocking scheme |
| 12/27/2005 | US6981155 System and method for computer security |
| 12/27/2005 | US6981153 Programmable logic device with method of preventing readback |
| 12/27/2005 | US6980427 Removable media |
| 12/27/2005 | US6980194 Amplitude conversion circuit for converting signal amplitude |
| 12/27/2005 | US6980184 Display devices and integrated circuits |
| 12/27/2005 | US6980040 Delay adjusting apparatus providing different delay times by producing a plurality of delay control signals |
| 12/27/2005 | US6980035 Auto-detect level shifter for multiple output voltage standards |
| 12/27/2005 | US6980034 Adaptive, self-calibrating, low noise output driver |
| 12/27/2005 | US6980033 Pseudo CMOS dynamic logic with delayed clocks |
| 12/27/2005 | US6980032 Level translator |
| 12/27/2005 | US6980031 Crosspoint switch with serializer and deserializer functions |
| 12/27/2005 | US6980030 Embedded function units with decoding |
| 12/27/2005 | US6980029 Programmable integrated circuit architecture |
| 12/27/2005 | US6980028 Dedicated input/output first in/first out module for a field programmable gate array |
| 12/27/2005 | US6980027 Synchronous first-in/first-out block memory for a field programmable gate array |
| 12/27/2005 | US6980026 Structures and methods for reducing power consumption in programmable logic devices |
| 12/27/2005 | US6980025 Programmable function generator and method operating as combinational, sequential, and routing cells |
| 12/27/2005 | US6980023 Dynamically adjustable signal detector |
| 12/27/2005 | US6980021 Output buffer with time varying source impedance for driving capacitively-terminated transmission lines |
| 12/27/2005 | US6980020 Calibration methods and circuits for optimized on-die termination |
| 12/27/2005 | US6980019 Output buffer apparatus capable of adjusting output impedance in synchronization with data signal |
| 12/27/2005 | US6980018 Self limiting gate leakage driver |
| 12/22/2005 | WO2005122411A1 Electronic circuit device |