Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
05/2008
05/22/2008WO2008060184A1 Semiconductor heterostructure for a field-effect transistor
05/22/2008WO2008059817A1 Organic thin film transistor and organic thin film light-emitting transistor
05/22/2008WO2008059816A1 Organic thin film transistor and organic thin film light-emitting transistor
05/22/2008WO2008059797A1 Functional molecular element, process for producing the same and functional molecular device
05/22/2008WO2008059768A1 Semiconductor device
05/22/2008WO2008059633A1 Semiconductor element, method for fabricating the same and display
05/22/2008WO2008059443A1 Self-aligned impact-ionization field effect transistor
05/22/2008WO2008059350A2 Semiconductor device and method for production thereof
05/22/2008WO2008058903A1 Vertical dram device, having a trench capacitor and a vertical transistor, and manufacturing method
05/22/2008WO2008034850A3 Assembly of nanoscaled field effect transistors
05/22/2008WO2008027722A3 Power trench mosfets having sige/si channel structure
05/22/2008US20080119026 Multi-State Non-Volatile Integrated Circuit Memory Systems that Employ Dielectric Storage Elements
05/22/2008US20080119024 Method of manufacturing a semiconductor device
05/22/2008US20080119021 Semiconductor device and method of manufacturing the same
05/22/2008US20080119016 Methods for fabricating three-dimensional carbon nanotube FET integrated circuits including selective deposition of carbon nanotubes onto catalysts on conductive layer at bottom of openings in dielectric layer; scalable to commercial production
05/22/2008US20080118769 Dopant doping while growing the thin film at a first temperature; interrupting the growth of the thin film and annealing the thin film at a second temperature higher than the first temperature; high temperature lowly doped layer growing step of growing the thin film at the second temperature
05/22/2008US20080117680 Non-Volatile Memory and Semiconductor Device
05/22/2008US20080117344 Liquid crystal display panel, method for fabricating the same, and thin film transistor substrate
05/22/2008US20080117149 Liquid crystal display device
05/22/2008US20080117144 Inspection device and inspection method for active matrix panel, and manufacturing method for active matrix organic light emitting diode panel
05/22/2008US20080116583 Semiconductor device and method of forming the same
05/22/2008US20080116542 Gate Dielectric Having a Flat Nitrogen Profile and Method of Manufacture Therefor
05/22/2008US20080116540 Stacked Switchable Element and Diode Combination With a Low Breakdown Switchable Element
05/22/2008US20080116539 Schottky device and process of making the same
05/22/2008US20080116538 Multigate schottky diode
05/22/2008US20080116535 Methods and apparatus for a dual-metal magnetic shield structure
05/22/2008US20080116534 Substrate contact for a MEMS device
05/22/2008US20080116533 Semiconductor device in wafer assembly
05/22/2008US20080116532 Method of manufacturing semiconductor device, and semiconductor device
05/22/2008US20080116530 Semiconductor Devices Having Transistors with Different Gate Structures and Related Methods
05/22/2008US20080116526 Semiconductor device and method for manufacturing the same
05/22/2008US20080116520 Termination Structures For Semiconductor Devices and the Manufacture Thereof
05/22/2008US20080116517 Dual stress device and method
05/22/2008US20080116515 Mugfet with increased thermal mass
05/22/2008US20080116514 Method and structure for reducing floating body effects in mosfet devices
05/22/2008US20080116513 Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
05/22/2008US20080116512 Semiconductor device and method of making the same
05/22/2008US20080116511 Semiconductor device with trench transistors and method for manufacturing such a device
05/22/2008US20080116510 Mos-gated device having a buried gate and process for forming same
05/22/2008US20080116509 Multi-State Non-Volatile Integrated Circuit Memory Systems that Employ Dielectric Storage Elements
05/22/2008US20080116508 Semiconductor memory device
05/22/2008US20080116507 Nonvolatile semiconductor memory device and method for manufacturing the same
05/22/2008US20080116506 Charge trapping devices with field distribution layer over tunneling barrier
05/22/2008US20080116505 Non-volatile memory cells formed in back-end-of line processes
05/22/2008US20080116504 Flash Memory Cell and Method for Manufacturing the Same
05/22/2008US20080116503 Semiconductor memory device including a stacked gate having a charge storage layer and a control gate, and method of manufacturing the same
05/22/2008US20080116502 Non-volatile memory with epitaxial regions for limiting cross coupling between floating gates
05/22/2008US20080116501 Pixel structure and repair method thereof
05/22/2008US20080116500 Semiconductor device and method for manufacturing the same
05/22/2008US20080116499 Gated Diode Nonvolatile Memory Process
05/22/2008US20080116498 Method of forming a semiconductor device having a capacitor and a resistor
05/22/2008US20080116494 Method for manufacturing a semiconductor device
05/22/2008US20080116493 Multi-layer spacer with inhibited recess/undercut and method for fabrication thereof
05/22/2008US20080116492 High voltage GaN transistors
05/22/2008US20080116491 Nanoscopic wire-based devices and arrays
05/22/2008US20080116490 Sensing method and nanosensing device for performing the same
05/22/2008US20080116489 Heterojunction bipolar transistor
05/22/2008US20080116488 Transistor structure and manufacturing method thereof
05/22/2008US20080116487 Methods of fabricating transistors having high carrier mobility and transistors fabricated thereby
05/22/2008US20080116486 Semiconductor device
05/22/2008US20080116483 High-quality sgoi by annealing near the alloy melting point
05/22/2008US20080116482 Method to form selective strained si using lateral epitaxy
05/22/2008US20080116481 Selective deposition of a dielectric on a self-assembled monolayer-adsorbed metal
05/22/2008US20080116464 Silicon-Rich Nickel-Silicide Ohmic Contacts for SIC Semiconductor Devices
05/22/2008US20080116462 Semiconductor device
05/22/2008US20080116461 Semiconductor device and manufacturing method thereof
05/22/2008US20080116460 Non-volatile memory device and fabrication method of non-volatile memory device and memory apparatus including non-volatile memory device
05/22/2008US20080116458 EL display device, driving method thereof, and electronic equipment provided with the EL display device
05/22/2008US20080116457 Driving device for unit pixel of organic light emitting display and method of manufacturing the same
05/22/2008US20080116456 Gallium nitride material structures including substrates and methods associated with the same
05/22/2008US20080116453 Transition metal complex and light-emitting device
05/22/2008US20080116448 Protected qubit based on superconducting current mirror
05/22/2008US20080116447 Non-volatile memory transistor with quantum well charge trap
05/22/2008US20080116446 Electron Emission Element and Electron Emission Element Fabrication Method
05/22/2008US20080116442 Phase change memory cell having a sidewall contact
05/22/2008US20080116439 Forming self-aligned nano-electrodes
05/22/2008US20080116368 Luminous Body, Electron Beam Detector Using the Same, Scanning Electron Microscope, and Mass Analysis Device
05/22/2008US20080115718 Polysilicon thin film transistor array panel and manufacturing method thereof
05/21/2008EP1923917A2 Method and apparatus for electrostatic discharge protection having a stable breakdown voltage and low snapback voltage
05/21/2008EP1923909A2 Charge trapping devices with field distribution layer over tunneling barrier
05/21/2008EP1923908A2 Fin-FET device with a void between pairs of fins and method of manufacturing the same
05/21/2008EP1923907A2 High electron mobility transistor semiconductor device and fabrication method thereof
05/21/2008EP1922758A2 Bipolar structures having improved bvceo/rcs trade-off made with depleted collector columns
05/21/2008EP1922755A2 Semiconductor device having improved mechanical and thermal reliability
05/21/2008EP1922749A2 A method for fabricating a semiconductor device
05/21/2008EP1618603A4 Mirror image memory cell transistor pairs featuring poly floating spacers
05/21/2008EP1356507A4 Capping layer for improved silicide formation in narrow semiconductor structures
05/21/2008EP1299903A4 Interface control for film deposition by gas-cluster ion-beam processing
05/21/2008EP1058949B1 Rf mos transistor
05/21/2008EP0965146B1 JUNCTION TERMINATION FOR SiC SCHOTTKY DIODE
05/21/2008DE10297639B4 Doppel-Polysilizium-Bipolartransistor mit einer Anordnung zur Kurzschluss-Vermeidung und ein Verfahren zur Herstellung einer solchen Anordnung Double polysilicon bipolar transistor with an arrangement for the short-circuit prevention and a method for producing such an arrangement
05/21/2008DE102007054028A1 Feldeffekt-Transistor mit einer Finnen-Struktur Field effect transistor having a fin structure
05/21/2008DE102007049000A1 Leistungs-Metall-Oxid-Silizium-Feldeffekttransistor Power metal-oxide-silicon field effect transistor
05/21/2008DE102006056809B3 Connection structure for e.g. vertical FET, has electrode connected with connecting structure of potential, another electrode connected with connecting structure of another potential, and trenches running on edge area
05/21/2008DE102006045312B3 Halbleiteranordnung mit gekoppelten Sperrschicht-Feldeffekttransistoren Semiconductor device coupled junction field-effect transistors
05/21/2008DE10117741B4 Verfahren zur Herstellung eines Halbleiter-Bauelements mit T-förmigen Kontaktelektrode A process for producing a semiconductor device with a T-shaped contact electrode
05/21/2008CN201063347Y Extension type soft recovery diode
05/21/2008CN101185169A Trenched-gate field effect transistors and methods of forming the same
05/21/2008CN101185158A Transistor and method for operating same
05/21/2008CN101183686A Asymmetric multi-gated transistor and method for forming
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