Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
07/2005
07/12/2005US6917079 Thin film transistor and method of manufacturing the same
07/12/2005US6917078 One transistor SOI non-volatile random access memory cell
07/12/2005US6917077 Protection diode for improved ruggedness of a radio frequency power transistor and self-defining method to manufacture such protection diode
07/12/2005US6917075 Semiconductor device
07/12/2005US6917074 Multiplexer structure with interdigitated gates and shared diffusion
07/12/2005US6917073 ONO flash memory array for improving a disturbance between adjacent memory cells
07/12/2005US6917072 Semiconductor memory device
07/12/2005US6917071 Semiconductor device, nonvolatile semiconductor storage apparatus using the device, and manufacture method of the device
07/12/2005US6917070 Single-poly EPROM and method for forming the same
07/12/2005US6917069 Semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor
07/12/2005US6917068 Semiconductor device having conductive structures formed near a gate electrode
07/12/2005US6917067 Semiconductor memory device and method of manufacturing the same
07/12/2005US6917065 Ferroelectric capacitor and semiconductor device
07/12/2005US6917064 Trench capacitor and a method for manufacturing the same
07/12/2005US6917063 Ferroelectric memory and method of fabricating the same
07/12/2005US6917062 Ferroelectric memory device
07/12/2005US6917061 AlGaAs or InGaP low turn-on voltage GaAs-based heterojunction bipolar transistor
07/12/2005US6917060 Lateral semiconductor device and vertical semiconductor device
07/12/2005US6917054 Semiconductor device
07/12/2005US6916981 Semiconductor layer, solar cell using it, and production methods and applications thereof
07/12/2005US6916745 Structure and method for forming a trench MOSFET having self-aligned features
07/12/2005US6916738 Semiconductor device and method of manufacturing the same
07/12/2005US6916732 Method of forming bumps
07/12/2005US6916730 Method for forming a gate
07/12/2005US6916729 Salicide formation method
07/12/2005US6916727 Enhancement of P-type metal-oxide-semiconductor field effect transistors
07/12/2005US6916721 Method for fabricating a trench capacitor with an insulation collar
07/12/2005US6916720 Thin film devices and method for fabricating thin film devices
07/12/2005US6916713 Code implantation process
07/12/2005US6916712 MOS-gated device having a buried gate and process for forming same
07/12/2005US6916711 EEPROM memory cell and method of forming the same
07/12/2005US6916709 Non-volatile semiconductor memory device and manufacturing method for the same
07/12/2005US6916707 High coupling floating gate transistor
07/12/2005US6916704 Multiple deposition of metal layers for the fabrication of an upper capacitor electrode of a trench capacitor
07/12/2005US6916698 High performance CMOS device structure with mid-gap metal gate
07/12/2005US6916695 Semiconductor device and method of manufacturing the same
07/12/2005US6916693 Semiconductor device and manufacturing method thereof
07/12/2005US6916691 Method of fabricating thin film transistor array substrate and stacked thin film structure
07/12/2005US6916690 Method of fabricating polysilicon film
07/12/2005US6916681 Method for manufacturing thin film device and semiconductor device using a third substrate
07/12/2005US6916679 Methods of and device for encapsulation and termination of electronic devices
07/12/2005US6916678 Surface modification method
07/12/2005US6916677 Magnetic storage apparatus having dummy magnetoresistive effect element and manufacturing method thereof
07/12/2005US6916676 Method for producing a nitride semiconductor element
07/12/2005US6916522 Charge-giving body, and pattern-formed body using the same
07/12/2005US6916451 Solid state surface catalysis reactor
07/12/2005US6915795 Method and system for dicing wafers, and semiconductor structures incorporating the products thereof
07/07/2005WO2005062393A2 Semiconductor light emitting devices and submounts and methods for forming the same
07/07/2005WO2005062388A1 Semiconductor device and method for manufacturing the same
07/07/2005WO2005062387A1 Formation of abrupt junctions in devices by using silicide growth dopant snowplow effect
07/07/2005WO2005062386A1 Vertical gate semiconductor device and process for fabricating the same
07/07/2005WO2005062385A1 Trench gate field effect devices
07/07/2005WO2005062378A1 Pillar cell flash memory technology
07/07/2005WO2005062366A1 Method for improving transistor performance through reducing the salicide interface resistance
07/07/2005WO2005062365A1 Gan-based permeable base transistor and method of fabrication
07/07/2005WO2005062364A1 Contoured insulator layer of silicon-on-onsulator wafers and process of manufacture
07/07/2005WO2005062354A1 A semiconductor substrate with solid phase epitaxial regrowth with reduced junction leakage and method of producing same
07/07/2005WO2005062353A1 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method
07/07/2005WO2005062345A2 A method of forming a silicon oxynitride layer
07/07/2005WO2005061762A1 Nano-array electrode manufacturing method and photoelectric converter using same
07/07/2005WO2005060676A2 A method for manufacturing a superjunction device with wide mesas
07/07/2005WO2005060464A2 Method and apparatus for forming an soi body-contacted transistor
07/07/2005WO2005048268A3 Nrom flash memory with self-aligned structural charge separation
07/07/2005WO2005036613A3 Ultra high-speed si/sige modulation-doped field effect transistors on ultra thin soi/sgoi substrate
07/07/2005WO2005029583A3 Schottky barrier integrated circuit
07/07/2005WO2004107440B1 Electronic parts, module, module assembling method, identification method, and environment setting method
07/07/2005WO2004105923A3 Electrohydrodynamic microfluidic mixer using transverse electric field
07/07/2005WO2004097836A3 Mirror image memory cell transistor pairs featuring poly floating spacers
07/07/2005WO2004038764A8 Semiconductor device with quantum well and etch stop
07/07/2005US20050149885 Rugged heterojunction bipolar transistor power device and the method thereof
07/07/2005US20050148209 Method for preventing metalorganic precursor penetration into porous dielectrics
07/07/2005US20050148178 Method for fabricating a p-channel field-effect transistor on a semiconductor substrate
07/07/2005US20050148160 Encapsulated semiconductor components and methods of fabrication
07/07/2005US20050148154 Semiconductor device and manufacturing method therefor
07/07/2005US20050148149 Method of manufacturing variable capacitance diode and variable capacitance diode
07/07/2005US20050148147 Amorphous etch stop for the anisotropic etching of substrates
07/07/2005US20050148146 High performance strained CMOS devices
07/07/2005US20050148144 Selective post-doping of gate structures by means of selective oxide growth
07/07/2005US20050148143 Deposition method of insulating layers having low dielectric constant of semiconductor device, a thin film transistor substrate using the same and a method of manufacturing the same
07/07/2005US20050148142 High performance FET with laterally thin extension
07/07/2005US20050148141 Methods of forming memory cells and arrays having underlying source-line connections
07/07/2005US20050148138 Method of manufacturing semiconductor device
07/07/2005US20050148137 Nonplanar transistors with metal gate electrodes
07/07/2005US20050148135 Method of fabricating a complementary bipolar junction transistor
07/07/2005US20050148133 Method of making strained channel CMOS transistors having lattice-mismatched epitaxial
07/07/2005US20050148131 Method of varying etch selectivities of a film
07/07/2005US20050148130 Method for making a semiconductor device that includes a metal gate electrode
07/07/2005US20050148129 Organic semiconductor device having an active dielectric layer comprising silsesquioxanes
07/07/2005US20050148128 Method of manufacturing a closed cell trench MOSFET
07/07/2005US20050148127 Semiconductor device including gate dielectric layer formed of high dielectric alloy and method of fabricating the same
07/07/2005US20050148126 Low voltage CMOS structure with dynamic threshold voltage
07/07/2005US20050148125 Low cost source drain elevation through poly amorphizing implant technology
07/07/2005US20050148124 ESD protection for semiconductor products
07/07/2005US20050148123 Method for fabricating self-aligned thin-film transistor
07/07/2005US20050148120 Polycide gate stucture and manufacturing method thereof
07/07/2005US20050148119 Method of manufacturing thin film transistor, method of manufacturing flat panel display, thin film transistor, and flat panel display
07/07/2005US20050148118 Horizontal TRAM and method for the fabrication thereof
07/07/2005US20050148117 Method for fabricating a flash-preventing window ball grid array semiconductor package
07/07/2005US20050148109 Partially transparent photovoltaic modules
07/07/2005US20050148105 Process for producing light-emitting semiconductor device