Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
03/2007
03/29/2007US20070072371 Semiconductor device and method for fabricating the same
03/29/2007US20070072370 Non-volatile memory and fabricating method thereof
03/29/2007US20070072369 Non-volatile memory and fabricating method thereof
03/29/2007US20070072366 Transistor structure for semiconductor device and method of fabricating the same
03/29/2007US20070072364 Method for fabricating transistor gate structures and gate dielectrics thereof
03/29/2007US20070072363 Method for fabricating transistor gate structures and gate dielectrics thereof
03/29/2007US20070072361 Method of reducing current leakage in a metal insulator metal semiconductor capacitor and semiconductor capacitor thereof
03/29/2007US20070072359 Semiconductor device, the method of manufacturing the same, and two-way switching device using the semiconductor devices
03/29/2007US20070072357 Method of manufacturing devices having vertical junction edge
03/29/2007US20070072354 Structures with planar strained layers
03/29/2007US20070072335 Semiconductor Devices Having Nano-Line Channels and Methods of Fabricating the Same
03/29/2007US20070072333 Reduced barrier photodiode / gate device structure for high efficiency charge transfer and reduced lag and method of formation
03/29/2007US20070072321 Device package and methods for the fabrication and testing thereof
03/29/2007US20070072310 Semiconductor device and method of manufacturing the same
03/29/2007US20070072125 Phase change memory element with improved cyclability
03/29/2007US20070071062 Nanocrystal structures
03/29/2007US20070070708 Nonvolatile semiconductor memory, fabrication method for the same, semiconductor integrated circuits and systems
03/29/2007US20070070346 Semiconductor device and semiconductor device production system
03/29/2007US20070070261 Thin film transistor array panel
03/29/2007US20070069642 Sphere-supported thin film phosphor electroluminescent devices
03/29/2007US20070069398 Overlay metrology mark
03/29/2007US20070069396 Semiconductor package, method of manufacturing the same, stacked semiconductor package including the same and method of manufacturing the stacked semiconductor package
03/29/2007US20070069393 Wiring board embedded with spherical semiconductor element
03/29/2007US20070069377 Clock distribution networks and conductive lines in semiconductor integrated circuits
03/29/2007US20070069347 Semiconductor chip and process for forming the same
03/29/2007US20070069340 Pickup device and pickup method
03/29/2007US20070069336 Seal ring corner design
03/29/2007US20070069335 Bonded wafer and its manufacturing method
03/29/2007US20070069334 Thin film resistors integrated at two different metal interconnect levels of single die
03/29/2007US20070069333 Integrated inductor structure and method of fabrication
03/29/2007US20070069332 Energy coupled superlattice structures for silicon based lasers and modulators
03/29/2007US20070069331 Methods of forming electromigration and thermal gradient based fuse structures
03/29/2007US20070069330 Fuse structure for a semiconductor device
03/29/2007US20070069329 Apparatus and method for reducing parasitic capacitance in a semiconductor device
03/29/2007US20070069328 Split gate flash devices
03/29/2007US20070069327 Method for manufacturing an integrated semiconductor device
03/29/2007US20070069326 Semiconductor device and a method of manufacturing the same
03/29/2007US20070069325 Multilayer substrate for digital tuner and multilayer substrate
03/29/2007US20070069324 Semiconductor device production method and semiconductor device
03/29/2007US20070069323 Semiconductor device
03/29/2007US20070069313 Hydrogen gas sensitive semiconductor sensor
03/29/2007US20070069312 Semiconductor device and method for fabricating the same
03/29/2007US20070069311 Electronic device with a gate electrode having at least two portions and a process for forming the electronic device
03/29/2007US20070069310 Semiconductor controlled rectifiers for electrostatic discharge protection
03/29/2007US20070069309 Buried well for semiconductor devices
03/29/2007US20070069308 LDMOS device and method for manufacturing the same
03/29/2007US20070069307 Semiconductor device and method of manufacturing the same
03/29/2007US20070069306 Apparatus and Method for Improving Drive-Strength and Leakage of Deep Submicron MOS Transistors
03/29/2007US20070069305 Single-event-effect tolerant SOI-based inverter, NAND element, NOR element, semiconductor memory device and data latch circuit
03/29/2007US20070069304 Semiconductor device and method for fabricating the same
03/29/2007US20070069303 Semiconductor device and method of fabricating the same
03/29/2007US20070069302 Method of fabricating CMOS devices having a single work function gate electrode by band gap engineering and article made thereby
03/29/2007US20070069301 Power transistor
03/29/2007US20070069300 Planar ultra-thin semiconductor-on-insulator channel mosfet with embedded source/drain
03/29/2007US20070069290 SRAM cell with asymmetrical pass gate
03/29/2007US20070069289 Method and apparatus for driving a power MOS device as a synchronous rectifier
03/29/2007US20070069287 Insulated gate transistor incorporating diode
03/29/2007US20070069286 Semiconductor device having an interconnect with sloped walls and method of forming the same
03/29/2007US20070069284 Method and Apparatus for Operating a String of Charge Trapping Memory Cells
03/29/2007US20070069283 Method of forming bottom oxide for nitride flash memory
03/29/2007US20070069282 Semiconductor device having gate insulating layers with differing thicknesses
03/29/2007US20070069280 Semiconductor device and method for fabricating the same
03/29/2007US20070069279 Semiconductor memory and method of manufacturing same
03/29/2007US20070069278 Non-volatile reprogrammable memory
03/29/2007US20070069276 Multi-use memory cell and memory array
03/29/2007US20070069275 Bi-directional read/program non-volatile floating gate memory array, and method of formation
03/29/2007US20070069274 Varactor design using area to perimeter ratio for improved tuning range
03/29/2007US20070069272 Semiconductor device comprising a Plurality of semiconductor constructs
03/29/2007US20070069270 Top electrode in a strongly oxidizing environment
03/29/2007US20070069269 Stacked capacitor and method of fabricating same
03/29/2007US20070069268 Recessed gate transistor structure and method of forming the same
03/29/2007US20070069267 Semiconductor device and manufacturing method thereof
03/29/2007US20070069266 Memory device
03/29/2007US20070069265 Recess transistor (TR) gate to obtain large self-aligned contact (SAC) open margin
03/29/2007US20070069264 Ferroelectric varactors suitable for capacitive shunt switching and wireless sensing
03/29/2007US20070069263 Electric switch and memory device using the same
03/29/2007US20070069262 Multi-layer interconnect with isolation layer
03/29/2007US20070069257 Power semiconductor component having a field electrode and method for producing this component
03/29/2007US20070069256 Semiconductor device comprising at least one MOS transistor having an etch stop layer, and corresponding fabrication process
03/29/2007US20070069255 Mos transistors having optimized channel plane orientation, semiconductor devices including the same, and methods of fabricating the same
03/29/2007US20070069254 Multiple-gate MOS transistor using Si substrate and method of manufacturing the same
03/29/2007US20070069253 Epitaxial substrate for field effect transistor
03/29/2007US20070069252 Insulated gate semiconductor device having a clamping element to clamp gate-emitter voltage and method of manufacturing thereof
03/29/2007US20070069251 Touch panel
03/29/2007US20070069250 Integrated circuit with depletion mode JFET
03/29/2007US20070069249 Phase change memory device and method of manufacturing the device
03/29/2007US20070069248 Solid-state image pickup device
03/29/2007US20070069247 Electro-optic displays, and components for use therein
03/29/2007US20070069246 Hybrid devices
03/29/2007US20070069245 Protective plate for a plasma display and a method for producing the same
03/29/2007US20070069244 Transistor Including Paramagnetic Impurities and Having Anti-Parallel Ferromagnetic Contacts
03/29/2007US20070069243 Forming closely spaced electrodes
03/29/2007US20070069240 III-V compound semiconductor heterostructure MOSFET device
03/29/2007US20070069239 Electronic device containing group-III elements based nitride semiconductors
03/29/2007US20070069237 Systems for providing electrostatic discharge protection
03/29/2007US20070069236 Control circuit and method for driving a half-bridge circuit
03/29/2007US20070069231 Semiconductor light-emitting device and method
03/29/2007US20070069225 III-V light emitting device
03/29/2007US20070069217 P-i-n diode crystallized adjacent to a silicide in series with a dielectric anitfuse
03/29/2007US20070069215 Array substrate of liquid crystal display device and method of fabricating the same
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