Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248) |
---|
05/02/2000 | US6057729 Power circuit |
05/02/2000 | US6057717 Output circuit, input circuit and input/output circuit |
05/02/2000 | US6057647 Light emitting device used for display device |
05/02/2000 | US6057604 Integrated circuit contact structure having gate electrode protection for self-aligned contacts with zero enclosure |
05/02/2000 | US6057599 Hybrid high-power microwave-frequency integrated circuit |
05/02/2000 | US6057591 Process for forming an edge structure to seal integrated electronic devices, and corresponding device |
05/02/2000 | US6057590 Structure of polysilicon load for static random access memory |
05/02/2000 | US6057588 Semiconductor integrated circuit device with digital circuit and analog circuit on common substrate and fabrication process therefor |
05/02/2000 | US6057586 Method and apparatus for employing a light shield to modulate pixel color responsivity |
05/02/2000 | US6057580 Semiconductor memory device having shallow trench isolation structure |
05/02/2000 | US6057579 Transistor structure of ESD protection device |
05/02/2000 | US6057578 Protective integrated structure with biasing devices having a predetermined reverse conduction threshold |
05/02/2000 | US6057577 Component of protection of an integrated MOS power transistor against voltage gradients |
05/02/2000 | US6057574 Contactless nonvolatile semiconductor memory device having buried bit lines surrounded by grooved insulators |
05/02/2000 | US6057573 Design for high density memory with relaxed metal pitch |
05/02/2000 | US6057572 Semiconductor integrated circuit device with MOS transistor and MOS capacitor and method for manufacturing the same |
05/02/2000 | US6057570 Solid-state image device |
05/02/2000 | US6057568 Application specific integrated circuit semiconductor device having MOS transistor with reduced gate resistance |
05/02/2000 | US6057556 Tunneling device and method of producing a tunneling device |
05/02/2000 | US6057555 High-frequency wireless communication system on a single ultrathin silicon on sapphire chip |
05/02/2000 | US6057538 Image sensor in which each lens element is associated with a plurality of pixels |
05/02/2000 | US6057225 Semiconductor integrated circuit device having fundamental cells and method of manufacturing the semiconductor integrated circuit device using the fundamental cells |
05/02/2000 | US6057216 Low temperature diffusion process for dopant concentration enhancement |
05/02/2000 | US6057204 Method of making a noise-isolated buried resistor by implanting a first well with a mask and then implanting an opposite conductivity well with a larger opening in the mask |
05/02/2000 | US6057203 Integrated circuit capacitor |
05/02/2000 | US6057202 Method for manufacturing an inductor with resonant frequency and Q value increased in semiconductor process |
05/02/2000 | US6057194 Method of forming trench transistor in combination with trench array |
05/02/2000 | US6057193 Elimination of poly cap for easy poly1 contact for NAND product |
05/02/2000 | US6057190 Method of manufacturing semiconductor device |
05/02/2000 | US6057189 Method of fabricating capacitor utilizing an ion implantation method |
05/02/2000 | US6057188 Trench capacitor structures |
05/02/2000 | US6057187 DRAM structure with multiple memory cells sharing the same bit-line contact and fabrication method thereof |
05/02/2000 | US6057186 Method for improving the butted contact resistance of an SRAM by double Vcc implantation |
05/02/2000 | US6057185 Method of manufacturing semiconductor device |
05/02/2000 | US6057184 Semiconductor device fabrication method using connecting implants |
05/02/2000 | US6057081 Process for manufacturing semiconductor integrated circuit device |
05/02/2000 | US6057036 Semiconductor substrate having a serious effect of gettering heavy metal and method of manufacturing the same |
05/02/2000 | US6056994 Liquid deposition methods of fabricating layered superlattice materials |
05/02/2000 | US6056783 Method for designing cell array layout of non-volatile memory device |
04/27/2000 | WO2000024064A1 A method and apparatus for performing wavelength-conversion using phosphors with light emitting diodes |
04/27/2000 | WO2000024059A1 Method of producing soi wafer by hydrogen ion implanting separation method and soi wafer produced by the method |
04/27/2000 | WO2000024043A1 Integrated polycrystalline silicon resistance with carbon or germanium |
04/27/2000 | WO2000023820A1 Direct radiographic imaging panel with shielding electrode |
04/27/2000 | WO2000005766A3 Silicon-on-insulator (soi) hybrid transistor device structure |
04/27/2000 | WO1999059101A3 Microencapsulated electrophoretic electrostatically-addressed media for drawing device applications |
04/27/2000 | DE19938907A1 Output buffer has MOS transistor with low potential node connected to control node of pull-up transistor and high potential nodes connected to low potential node of another transistor and high potential supply line |
04/27/2000 | DE19849471A1 Integrated high ohmic polycrystalline resistor, used in analog and digital circuits, comprises a polycrystalline resistive layer of silicon containing carbon and-or germanium |
04/27/2000 | DE19849097A1 Verfahren zur Schaltzustandsüberwachung eines IGBT und Vorrichtung zur Durchführung des Verfahrens A process for monitoring the switching state of an IGBT, and apparatus for carrying out the method |
04/27/2000 | CA2339611A1 Direct radiographic imaging panel with shielding electrode |
04/26/2000 | EP0996314A1 Circuit board for organic electroluminescent panel, method of manufacture, and electroluminescent panel |
04/26/2000 | EP0996227A2 Method of controlling the switching state of a IGBT and device for carrying out the method |
04/26/2000 | EP0996176A1 Method of fabricating and structure of an active matrix light-emitting display device |
04/26/2000 | EP0996164A2 An elevated pin diode active pixel sensor including a unique interconnection structure |
04/26/2000 | EP0996163A2 Memory cell array and implantation mask for making the same |
04/26/2000 | EP0996162A1 Low resistance contact structure for a select transistor of EEPROM memory cells |
04/26/2000 | EP0996161A1 EEPROM with common control gate and common source for two cells |
04/26/2000 | EP0996160A1 Contact structure for a semiconductor device |
04/26/2000 | EP0996159A1 Integrated circuit structure comprising capacitor and corresponding manufacturing process |
04/26/2000 | EP0996158A1 High voltage resistive structure integrated on a semiconductor substrate |
04/26/2000 | EP0996153A1 Memory cell |
04/26/2000 | EP0996152A1 Process for manufacturing electronic devices comprising non-salicidated nonvolatile memory cells, non-salicidated HV transistors, and salicidated-junction LV transistors |
04/26/2000 | EP0996151A2 Method for fabricating transistors |
04/26/2000 | EP0996129A1 DRAM memory cell |
04/26/2000 | EP0995341A1 Driving circuit for stacked organic light emitting devices |
04/26/2000 | EP0995227A1 A controlled cleavage process |
04/26/2000 | EP0995183A2 Bonded active matrix organic light emitting device display and method of producing the same |
04/26/2000 | EP0950264A4 Low-resistivity photon-transparent window attached to photo-sensitive silicon detector |
04/26/2000 | CN1251470A Method for producing transistor |
04/26/2000 | CN1251468A Method for producing lower electrode of capacitor |
04/26/2000 | CN1051881C Mfg. method for circuit module |
04/26/2000 | CN1051880C Dipolar integrated circuit with VR-tube and mfg. method thereof |
04/26/2000 | CN1051879C Double-layer polycrystalline silicon CMOS digital-analog hybrid integrated circuit and mfg. method |
04/26/2000 | CN1051877C Semiconductor device and method for producing same |
04/25/2000 | US6055655 Semiconductor integrated circuit device and method of testing the same |
04/25/2000 | US6055450 Bifurcated gamma camera system |
04/25/2000 | US6055367 Semiconductor device compensation system and method |
04/25/2000 | US6055197 Semiconductor memory device with simultaneously activated elements and a redundancy scheme thereof |
04/25/2000 | US6055185 Single-poly EPROM cell with CMOS compatible programming voltages |
04/25/2000 | US6055182 Semiconductor memory cell and method of manufacturing the same |
04/25/2000 | US6055181 Nonvolatile semiconductor memory device capable of storing multi-value data of more than one bit in a memory cell |
04/25/2000 | US6055178 Magnetic random access memory with a reference memory array |
04/25/2000 | US6055175 Nonvolatile ferroelectric memory |
04/25/2000 | US6055172 Single deposition layer metal dynamic random access memory |
04/25/2000 | US6055149 Current limited, thermally protected, power device |
04/25/2000 | US6055143 Electrostatic discharge protection circuit triggered by EPROM |
04/25/2000 | US6054872 Semiconductor integrated circuit with mixed gate array and standard cell |
04/25/2000 | US6054760 Surface-connectable semiconductor bridge elements and devices including the same |
04/25/2000 | US6054751 Semiconductor integrated circuit |
04/25/2000 | US6054750 Inductor formed at least partially in a substrate |
04/25/2000 | US6054747 Integrated photoreceiver having metal-insulator-semiconductor switch |
04/25/2000 | US6054746 Image sensor and its manufacture |
04/25/2000 | US6054745 Nonvolatile memory cell using microelectromechanical device |
04/25/2000 | US6054743 High voltage MOS transistor |
04/25/2000 | US6054742 Structure for cross coupled thin film transistors and static random access memory cell |
04/25/2000 | US6054741 Substrate and isulation/masking structure for a semiconductor device |
04/25/2000 | US6054740 Protection against overvoltages of an integrated MOS power transistor |
04/25/2000 | US6054739 Semiconductor device having channel refractive index in first and second directions |
04/25/2000 | US6054738 Integrated circuit configuration for driving a power MOSFET with a load on the source side |
04/25/2000 | US6054734 Non-volatile memory cell having dual gate electrodes |
04/25/2000 | US6054732 Single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size |