Patents
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
07/2000
07/12/2000EP1018141A1 Method and apparatus for employing a light shield to modulate pixel color responsivity
07/12/2000EP1018118A1 Mram with shared word and digit lines
07/12/2000EP0763258B1 Non-volatile memory structure including protection and structure for maintaining threshold stability
07/12/2000EP0739538B1 Method of forming a resistor
07/12/2000CN1259770A Integrated circuit contg. low diffusion capacitance network
07/12/2000CN1259769A Integrated circuit of inductance element
07/12/2000CN1259767A Wafer stage package and mfg. method therefor, and method for mfg. semiconductor device made up of same
07/12/2000CN1259765A Semiconductor integrated circuit and mfg. method therefor
07/12/2000CN1259758A Method for mfg. semiconductor crystal plate, use and utilization method
07/11/2000USRE36777 Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer
07/11/2000US6088819 Dynamic semiconductor memory device and method of testing the same
07/11/2000US6088287 Flash memory architecture employing three layer metal interconnect for word line decoding
07/11/2000US6088283 Semiconductor memory device capable of preventing noise from occurring in the bus lines
07/11/2000US6088276 Semiconductor device provided with a circuit performing fast data reading with a low power consumption
07/11/2000US6088267 Nonvolatile semiconductor memory device having row decoder
07/11/2000US6088265 Virtual ground type semiconductor storage device
07/11/2000US6088263 Non-volatile memory using substrate electrons
07/11/2000US6088260 Dynamic random access memory cell and method for fabricating the same
07/11/2000US6088257 Ferroelectric random access memory device and method for operating the same
07/11/2000US6088253 Semiconductor memory device and method for forming same
07/11/2000US6088252 Semiconductor storage device with an improved arrangement of electrodes and peripheral circuits to improve operational speed and integration
07/11/2000US6088216 Lead silicate based capacitor structures
07/11/2000US6088055 Electro-optical imaging array and camera system with pitch rate image motion compensation
07/11/2000US6087895 Semiconductor integrated circuit having power lines separately routed to input circuits and circuit unit using it
07/11/2000US6087893 Semiconductor integrated circuit having suppressed leakage currents
07/11/2000US6087889 Fuse circuit for a semiconductor device
07/11/2000US6087877 Integrated circuit having surge protection circuit
07/11/2000US6087849 Soft error immunity in CMOS circuits with large shared diffusion areas
07/11/2000US6087813 Internal voltage generation circuit capable of stably generating internal voltage with low power consumption
07/11/2000US6087772 Organic electroluminecent display device suitable for a flat display and method of forming the same
07/11/2000US6087771 Electroluminescent display and method for making the same
07/11/2000US6087730 Electronic devices and their manufacture
07/11/2000US6087728 Interconnect design with controlled inductance
07/11/2000US6087727 Misfet semiconductor device having different vertical levels
07/11/2000US6087710 Semiconductor device having self-aligned contacts
07/11/2000US6087707 Structure for an antifuse cell
07/11/2000US6087703 Photodetector and photodetection circuit
07/11/2000US6087699 Laminated gate mask ROM device
07/11/2000US6087698 Semiconductor device and method of manufacturing the same
07/11/2000US6087694 Semiconductor memory device and fabrication method thereof
07/11/2000US6087692 DRAM cell configuration and method for its fabrication
07/11/2000US6087691 Semiconductor device having lower minority carrier noise
07/11/2000US6087690 Single polysilicon DRAM cell with current gain
07/11/2000US6087689 Memory cell having a reduced active area and a memory array incorporating the same
07/11/2000US6087688 Field effect transistor
07/11/2000US6087687 MISFET device with ferroelectric gate insulator
07/11/2000US6087686 Pixel with buried channel spill well and transfer gate
07/11/2000US6087685 Solid-state imaging device
07/11/2000US6087680 Led device
07/11/2000US6087676 Multi-chip module system
07/11/2000US6087674 Memory element with memory material comprising phase-change material and dielectric material
07/11/2000US6087648 Active matrix display device and method of manufacturing the same
07/11/2000US6087647 Solid state imaging device and driving method therefor
07/11/2000US6087259 Chemical vapor deposition of a titanium nitride film which serves as a diffusion barrier to suppress a reaction of tungsten, which forms the bit line, with silicon on a contact region during a thermal process at a high temperature
07/11/2000US6087246 Method for fabricating dual gate semiconductor device
07/11/2000US6087244 Methods of forming semiconductor-on-insulator devices including buried layers of opposite conductivity type
07/11/2000US6087241 Method of forming side dielectrically isolated semiconductor devices and MOS semiconductor devices fabricated by this method
07/11/2000US6087237 Method of manufacturing a MOSFET by forming a single oxide layer doping with either an oxide accelerator or an oxide inhibitor producing asymmetric thickness
07/11/2000US6087228 Method of making a nonvolatile memory cell using EPROM mask and ROM processing steps
07/11/2000US6087227 Method for fabricating an electrostatic discharge protection circuit
07/11/2000US6087225 Method for dual gate oxide dual workfunction CMOS
07/11/2000US6087224 Manufacture of trench-gate semiconductor devices
07/11/2000US6087223 Method of fabricating flash memory with dissymmetrical floating gate
07/11/2000US6087219 Highly reliable flash memory structure with halo source
07/11/2000US6087218 Method for manufacturing DRAM capacitor
07/11/2000US6087216 Method of manufacturing DRAM capacitor
07/11/2000US6087215 Method of fabricating a DRAM device
07/11/2000US6087214 Arrangement and method for DRAM cell using shallow trench isolation
07/11/2000US6087213 Semiconductor memory device and manufacturing method thereof
07/11/2000US6087212 Method for forming a storage node in a semiconductor memory
07/11/2000US6087211 Method for forming a semiconductor device having non-volatile memory cells, High-voltage transistors, and low-voltage, deep sub-micron transistors
07/11/2000US6087196 Depositing semiconductor organic material in solvent onto substrate by ink jet printing; evaporating solvent whereby organic material remains on substrate
07/11/2000US6086626 Method for verification of combinational circuits using a filtering oriented approach
07/06/2000WO2000040010A1 Contoured surface cover plate for image sensor array
07/06/2000WO2000039860A1 Injection non-coherent emitter
07/06/2000WO2000039857A1 Integrated circuit impedance device and method of manufacture therefor
07/06/2000WO2000039856A1 Avalanche programmed floating gate memory cell structure with program element in polysilicon
07/06/2000WO2000039855A1 Avalanche programmed floating gate memory cell structure with the program element comprising an avalanche diode formed in the first polysilicon layer
07/06/2000WO2000039854A1 Coaxial type signal line and manufacturing method thereof
07/06/2000WO2000039848A2 Test method and assembly including a test die for testing a semiconductor product die
07/06/2000WO2000039842A1 Capacitor electrode structure
07/06/2000WO2000039821A2 Improved layout technique for a matching capacitor array using a continuous upper electrode
07/06/2000WO2000039805A1 Floating gate memory apparatus and method for selected programming thereof
07/06/2000WO2000002253A3 Silicon thin-film, integrated solar cell, module, and methods of manufacturing the same
07/06/2000WO1999065065A9 Etching process for producing substantially undercut free silicon on insulator structures
07/06/2000DE19962053A1 Semiconductor device with silicon-on-insulator structure has semiconductor regions in latter separated via separation regions with insulating upper part and semiconductor lower part
07/06/2000DE19959565A1 Halbleiterbauelement und Entwurfsverfahren hierfür The semiconductor device design method therefor, and
07/06/2000DE19958144A1 Programmierbare Zwischenverbindungszelle zum wahlweisen Verbinden von Schaltkreisknoten in einem integrierten Schaltkreis Programmable interconnect cell for selectively connecting circuit nodes in an integrated circuit
07/06/2000DE19958143A1 Programmable connection for logic IC circuit nodes using switching FET with floating gate coupled to floating gate of read FET
07/06/2000DE19951930A1 Two-transistor type electrically erasable programmable read only memory has a selection transistor gate electrode with two selection gate electrodes separated by an interlevel insulation layer
07/06/2000DE19947887A1 Static semiconductor memory (SRAM) for LV operation with CMOS memory cells, each with six transistors of specified conductivities
07/06/2000DE19928781C1 DRAM cell array has deep word line trenches for increasing transistor channel length and has no fixed potential word lines separating adjacent memory cells
07/06/2000DE19914490C1 DRAM or FRAM cell array, with single transistor memory cells, has trench conductive structures and upper source-drain regions overlapping over a large area for low contact resistance between capacitors and transistors
07/06/2000DE19860701A1 Integrated circuit structure comprises a common substrate having different technology components, e.g. hetero bipolar transistors, with active regions consisting of the same vertical sequence of semiconductor layers
07/06/2000DE19860501A1 Capacitor for a dynamic random access memory is produced by applying a conductive support to a structured alternating conductive and sacrificial layer sequence prior to selective sacrificial layer removal
07/06/2000CA2358897A1 Injection non-coherent emitter
07/05/2000EP1017231A2 Photodiode active pixel sensor with shared reset signal and row select
07/05/2000EP1017221A1 Image sensor substrate and image sensor employing it
07/05/2000EP1017107A2 Photogate active pixel sensor with high fill factor and correlated double sampling
07/05/2000EP1017106A2 Active pixel sensor with wired floating diffusions and shared amplifier