Patents
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
05/2000
05/24/2000EP1003218A1 Semiconductor devices comprising a Schottky diode and a diode having a highly doped region and corresponding manufacturing methods
05/24/2000EP1003217A2 Regulating resistor network, semiconductor device including the resistor network, and method for fabricating the device
05/24/2000EP1003216A2 Multilayered ceramic structure
05/24/2000EP1003208A2 Integrated circuit having self-aligned hydrogen barrier layer and method for fabricating same
05/24/2000EP1003206A2 Rutile dielectric material for semiconductor devices
05/24/2000EP1003176A2 Magnetic memory
05/24/2000EP1002340A4 Tunable dielectric flip chip varactors
05/24/2000EP1002340A2 Tunable dielectric flip chip varactors
05/24/2000EP1002319A2 A ferroelectric data processing device
05/24/2000EP0941612A4 Electro-optical imaging array and camera system with pitch rate image motion compensation
05/24/2000EP0742847B1 A method of depositing tungsten nitride using a source gas comprising silicon
05/24/2000CN1254417A Leakage current correction circuit
05/24/2000CN1254189A Low-voltage high-speed store unit and its making method
05/24/2000CN1254188A Ferro-electric storage read-write memory
05/24/2000CN1254187A Semiconductor device
05/24/2000CN1254186A Electric fuse with close space length and its production method in semiconductor
05/24/2000CN1052817C Insulated-gate device (IG device) having narrowbandgap-source structure and method of manufacturing the same
05/24/2000CN1052816C 半导体装置及其制造方法 Semiconductor device and manufacturing method thereof
05/24/2000CN1052815C 薄膜半导体集成电路 Thin-film semiconductor integrated circuit
05/24/2000CN1052814C Unit of semiconductor IC
05/24/2000CN1052812C Semi-conductor storage device
05/23/2000USRE36706 Microstructure design for high IR sensitivity
05/23/2000US6067633 Design and methodology for manufacturing data processing systems having multiple processors
05/23/2000US6067268 Redundancy fuse box and method for arranging the same
05/23/2000US6067255 Merged memory and logic (MML) integrated circuits including independent memory bank signals and methods
05/23/2000US6067253 Nonvolatile semiconductor memory device capable of suppressing a variation of the bit line potential
05/23/2000US6067251 Non-volatile semiconductor memory device
05/23/2000US6067250 Method and apparatus for localizing point defects causing leakage currents in a non-volatile memory device
05/23/2000US6067249 Layout of flash memory and formation method of the same
05/23/2000US6067248 Nonvolatile semiconductor memory with single-bit and multi-bit modes of operation and method for performing programming and reading operations therein
05/23/2000US6067245 High speed, high bandwidth, high density nonvolatile memory system
05/23/2000US6067132 LCD having contact electrode coupling gate electrode of first pixel to region active layer of second pixel region
05/23/2000US6067062 Light valve device
05/23/2000US6066969 Semiconductor device with DLL circuit avoiding excessive power consumption
05/23/2000US6066896 Semiconductor integrated circuit device and its manufacturing method
05/23/2000US6066886 Semiconductor wafer in which redundant memory portion is shared by two neighboring semiconductor memory portions and is connected to the semiconductor memory portions
05/23/2000US6066884 Schottky diode guard ring structures
05/23/2000US6066883 Guarding for a CMOS photosensor chip
05/23/2000US6066881 Integrated circuit having a memory cell transistor with a gate oxide layer which is thicker than the gate oxide layer of a peripheral circuit transistor
05/23/2000US6066880 Semiconductor device
05/23/2000US6066879 Combined NMOS and SCR ESD protection device
05/23/2000US6066877 Vertical power MOSFET having thick metal layer to reduce distributed resistance
05/23/2000US6066876 Integrated circuit arrangement having at least one MOS transistor manufactured by use of a planar transistor layout
05/23/2000US6066874 Flash memory cell with vertical channels, and source/drain bus lines
05/23/2000US6066872 Semiconductor device and its fabricating method
05/23/2000US6066871 Semiconductor memory device having a memory cell capacitor and a fabrication process thereof
05/23/2000US6066870 Single digit line with cell contact interconnect
05/23/2000US6066869 Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor
05/23/2000US6066868 Ferroelectric based memory devices utilizing hydrogen barriers and getters
05/23/2000US6066867 Current control functional device
05/23/2000US6066866 Semiconductor device with alternating general-purpose functional regions and specific functional regions
05/23/2000US6066860 Substrate for electro-optical apparatus, electro-optical apparatus, method for driving electro-optical apparatus, electronic device and projection display device
05/23/2000US6066567 Removing a silicon oxynitride bottom antireflective coating, in-situ, during a resistor protect etching process using a plasma formed with carbon tetrafluoride, chloroform and argon gas
05/23/2000US6066566 High selectivity collar oxide etch processes
05/23/2000US6066563 Method for manufacturing semiconductor device
05/23/2000US6066540 Method for manufacturing a capacitor of a semiconductor device
05/23/2000US6066539 Honeycomb capacitor and method of fabrication
05/23/2000US6066538 Methods and apparatus for forming integrated circuit capacitors having composite oxide-nitride-oxide dielectric layers therein
05/23/2000US6066537 Method for fabricating a shielded multilevel integrated circuit capacitor
05/23/2000US6066531 Method for manufacturing semiconductor memory device
05/23/2000US6066528 Method for forming a capacitor compatible with high dielectric constant materials having two independent insulative layers
05/23/2000US6066527 Buried strap poly etch back (BSPE) process
05/23/2000US6066526 Method of making trench DRAM
05/23/2000US6066525 Method of forming DRAM capacitor by forming separate dielectric layers in a CMOS process
05/23/2000US6066524 Method for fabricating SRAM cell
05/23/2000US6066522 Semiconductor device and method for producing the same
05/23/2000US6066521 Method for manufacturing BiMOS device with improvement of high frequency characteristics of bipolar transistor
05/23/2000US6066520 Method of manufacturing a BiCMOS semiconductor device
05/23/2000US6066511 Manufacturing method for a solid state imaging device
05/23/2000US6066508 Treating a semiconductor integrated circuit wafer, as housed in a reaction furnace, in a hydrogen gas, discharging hydrogen gas form outside of the furnace, converting hydrogen into water by treating the gas with oxidation catalyst
05/23/2000US6066357 Methods of making a full-color organic light-emitting display
05/23/2000US6065973 Memory cell having active regions without N+ implants
05/23/2000CA2175224C Radiation detector
05/18/2000WO2000028729A1 Imaging device
05/18/2000WO2000028664A2 Fully integrated tuner architecture
05/18/2000WO2000028599A1 Transistor array
05/18/2000WO2000028597A1 Nonvolatile memory
05/18/2000WO2000028596A1 Memory cell arrangement
05/18/2000WO2000028595A1 High density integrated circuit
05/18/2000WO2000028594A1 Over-voltage protection for integrated analog and digital circuits
05/18/2000WO2000028593A1 Method for producing a semiconductor component with wiring partly extending in the substrate and semiconductor component produced according to said method
05/18/2000WO2000028576A2 Semiconductor component having a wiring partly extending in the substrate and method for producing same
05/18/2000WO2000028513A1 Electronic device with solar cell
05/18/2000WO2000028399A1 Protection circuit for an integrated circuit
05/18/2000WO2000016404A8 Lateral bipolar transistor and method of making same.
05/18/2000DE19955105A1 Semiconductor laminated conductor track structure (STACKED VIA) used high integration processes, e.g. LSI, VLSI
05/18/2000DE19953784A1 Variable load circuit for variable signal transmission circuit, responds to control signal resulting from switch-on by variably coupling signal line to signal node via meltable fuse and capacitor
05/18/2000DE19952177A1 Verfahren zum Ausbilden einer zweifachen Kobaltsilicidschicht mit unterschiedlichen Dicken während der Herstellung einer integrierten Schaltung und entsprechende IC-Struktur A method of forming a dual Kobaltsilicidschicht having different thicknesses during fabrication of an integrated circuit and corresponding IC structure
05/18/2000DE19950193A1 Mittel-Versorgungsreferenzspannungsgenerator Medium supply reference voltage generator
05/18/2000DE19911149C1 IC structure, e.g. a DRAM cell array, has a buried conductive structure with two different conductivity portions separated by a diffusion barrier
05/18/2000DE19911148C1 DRAM cell array has single vertical transistor memory cells with buried bit lines and low space requirement
05/17/2000EP1001659A1 Organic el display and method of manufacturing the same
05/17/2000EP1001469A2 Forming contacts on semiconductor substrates for radiation detectors and imaging devices
05/17/2000EP1001467A2 Semiconductor device and method of manufacturing the same
05/17/2000EP1001466A1 High-voltage transistor structure for handling high-voltages in CMOS integrated circuits
05/17/2000EP1001463A2 Aluminum interconnects for integrated circuits comprising titanium under and overlayers
05/17/2000EP1001459A2 Integrated circuit comprising a capacitor and method
05/17/2000EP1001431A1 Capacitor loaded memory cell
05/17/2000EP1000442A4 Vialess integrated inductive elements for electromagnetic applications
05/17/2000EP1000442A1 Vialess integrated inductive elements for electromagnetic applications