H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/1988
06/28/1988	US4754315 Bipolar semiconductor devices with implanted recombination region
06/28/1988	US4754314 Split-level CMOS
06/28/1988	US4754313 Semiconductor memory device having stacked-capacitor type memory cells
06/28/1988	US4754311 Semiconductor device with contacts to parallel electrode strips
06/28/1988	US4754310 High voltage semiconductor device
06/28/1988	US4754254 Temperature detector
06/28/1988	US4754200 Systems and methods for ion source control in ion implanters
06/28/1988	US4754117 Annealing method by irradiation of light beams
06/28/1988	US4753901 Two mask technique for planarized trench oxide isolation of integrated devices
06/28/1988	US4753900 Method of forming electrodes aligned with respect to a level of implantation in a substrate and a method of forming a charge transfer filter
06/28/1988	US4753899 Process for the fabrication of a Schottky gate field-effect transistor having a submicron effective channel length
06/28/1988	US4753898 Separation of spacer forming materials
06/28/1988	US4753897 Forming dopant blocking layer on segments, then intermetallic
06/28/1988	US4753896 Sidewall channel stop process
06/28/1988	US4753895 Ion implantation amorphizing buried layer; recaystallization
06/28/1988	US4753866 Method for processing an interlevel dielectric suitable for VLSI metallization schemes
06/28/1988	US4753856 Multilayer ceramic coatings from silicate esters and metal oxides
06/28/1988	US4753855 Multilayer ceramic coatings from metal oxides for protection of electronic devices
06/28/1988	US4753851 Multiple layer, tungsten/titanium/titanium nitride adhesion/diffusion barrier layer structure for gold-base microcircuit interconnection
06/28/1988	US4753820 Alignment to ensure registration of bond pads with leads
06/28/1988	US4753818 Process for photochemical vapor deposition of oxide layers at enhanced deposition rates
06/28/1988	US4753783 Reacting sodium fluosilicate with sodium
06/28/1988	US4753763 Method of manufacturing heating furnace parts
06/28/1988	US4753709 Method for etching contact vias in a semiconductor device
06/28/1988	US4753694 Process for forming multilayered ceramic substrate having solid metal conductors
06/28/1988	US4753598 Pivoting electrical contact
06/28/1988	US4753258 Treatment basin for semiconductor material
06/28/1988	US4753049 Method and apparatus for grinding the surface of a semiconductor
06/28/1988	US4753004 Chip mounter
06/28/1988	CA1238721A1 Dopant control of metal silicide formation
06/28/1988	CA1238719A1 Reversible charge storage floating gate heterojunction device
06/28/1988	CA1238557A1 Process for the production of a compound crystal
06/28/1988	CA1238480A1 Method of fabricating solar cells
06/23/1988	DE3742387A1 Photosensitive composition
06/23/1988	DE3739804A1 Dynamische speichergruppierung mit wahlfreiem zugriff Dynamic random access memory grouping
06/23/1988	DE3642391A1 Method of aligning a working substrate in a substrate-aligning device
06/22/1988	EP0272143A2 Bromine and iodine etch process for silicon and silicides
06/22/1988	EP0272142A2 Magnetic field enhanced plasma etch reactor
06/22/1988	EP0272141A2 Multiple chamber integrated process system
06/22/1988	EP0272140A2 TEOS based plasma enhanced chemical vapor deposition process for deposition of silicon dioxide films.
06/22/1988	EP0272051A2 Reduced area butting contact structure
06/22/1988	EP0272046A2 Circuit arrangement including a composite ceramic substrate
06/22/1988	EP0271958A2 Apparatus suitable for processing semiconductor slices
06/22/1988	EP0271932A2 EEPROM memory cell with two levels of polysilicon and a tunnel oxide zone
06/22/1988	EP0271749A2 Process for the manufacture of an integrated electronic device, in particular a CMOS device, with segregation of metallic impurities
06/22/1988	EP0271736A1 Resins of low thermal expansivity
06/22/1988	EP0271686A2 On chip multi-level voltage generation system
06/22/1988	EP0271599A1 Collector contact of an integrated bipolar transistor
06/22/1988	EP0271596A1 VLSI-chip design and manufacturing process
06/22/1988	EP0271508A1 Electron-beam probing of photodiodes.
06/22/1988	EP0271503A1 Method and apparatus for spreading resin by centrifugation
06/22/1988	EP0155283B1 Focused ion beam column
06/22/1988	CN87201554U Miniature glass-enveloped temp. compensation biode
06/22/1988	CN87107677A Source drain doping technique
06/22/1988	CN87107402A 半导体器件 Semiconductor devices
06/21/1988	US4752912 Floating gate device
06/21/1988	US4752898 Edge finding in wafers
06/21/1988	US4752862 Electronic device
06/21/1988	US4752819 Semiconductor integrated circuit device having a carrier trapping trench arrangement
06/21/1988	US4752816 Electronic component
06/21/1988	US4752815 Method of fabricating a Schottky barrier field effect transistor
06/21/1988	US4752813 Multilayer, electroconductivity, baarriers
06/21/1988	US4752699 On chip multiple voltage generation using a charge pump and plural feedback sense circuits
06/21/1988	US4752686 Method and apparatus for emphasizing a specimen surface region scanned by a scanning microscope primary beam
06/21/1988	US4752668 System for laser removal of excess material from a semiconductor wafer
06/21/1988	US4752592 Annealing method for compound semiconductor substrate
06/21/1988	US4752591 Self-aligned contacts for bipolar process
06/21/1988	US4752590 Method of producing SOI devices
06/21/1988	US4752589 Process for the production of bipolar transistors and complementary MOS transistors on a common silicon substrate
06/21/1988	US4752555 Conductor, resistor and insulating resin layers; second conductor formed by plating insulator, etching
06/21/1988	US4752505 Pre-metal deposition cleaning for bipolar semiconductors
06/21/1988	US4752442 Bonding wire
06/21/1988	US4752219 Wafer softlanding system and cooperative door assembly
06/21/1988	US4752198 Apparatus for simultaneously encapsulating a plurality of electronic components
06/21/1988	US4752180 Method and apparatus for handling semiconductor wafers
06/21/1988	US4752118 Electric circuits having repairable circuit lines and method of making the same
06/21/1988	US4751895 Door closure apparatus for encapsulating a wafer paddle
06/21/1988	CA1238429A1 Low resistivity hillock free conductors in vlsi devices
06/21/1988	CA1238428A1 Thermally enhanced integrated circuit carrier package
06/21/1988	CA1238415A1 Microwave ion source
06/20/1988	EP0168437A4 Wafer processing machine.
06/20/1988	EP0168436A4 Wafer processing machine.
06/16/1988	WO1988004474A1 Hetero-junction bipolar transistor
06/16/1988	WO1988004473A1 Enhanced density modified isoplanar process
06/16/1988	WO1988004472A1 Method of fabricating self aligned semiconductor devices
06/16/1988	WO1988004440A1 Optical reading of quantum well device
06/16/1988	WO1988004333A1 Production of silicon carbide
06/16/1988	WO1988004332A1 Multilayered structures
06/15/1988	EP0271412A2 High density ROM in a CMOS gate array
06/15/1988	EP0271346A2 Transistor employing composite of semiconductor material and conductive material
06/15/1988	EP0271341A2 Method and apparatus for ion etching
06/15/1988	EP0271247A2 A MOS field effect transistor and a process for fabricating the same
06/15/1988	EP0271232A1 Method of making an article comprising a heteroepitaxial structure
06/15/1988	EP0271110A2 Semiconductor device comprising an electrode pad
06/15/1988	EP0271107A2 Mold cleaning composition, sheet for cleaning mold, and method for cleaning mold using said cleaning sheet
06/15/1988	EP0271080A2 Indium-phosphide hetero-MIS-gate field effect transistor
06/15/1988	EP0271072A1 Method of defined arsenic doping in silicon substrates
06/15/1988	EP0271070A1 Semiconductor device with silicide conductive layers and process of fabrication thereof
06/15/1988	EP0271018A2 Thin film solid state device
06/15/1988	EP0270991A2 Apparatus for forming thin film

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