Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/1995
03/02/1995DE4429902A1 Method for forming a fine pattern in a semiconductor device
03/02/1995DE4409367A1 Method for producing a thin-film transistor
03/02/1995DE4340996C1 Method and device for producing a film laminate
03/01/1995EP0641153A1 Method of making subsurface electronic circuits
03/01/1995EP0641150A1 Process apparatus
03/01/1995EP0641038A2 Methods for connecting flexible circuit substrates to contact objects and structures thereof
03/01/1995EP0641028A2 A thin film device and a method for fabricating the same
03/01/1995EP0641027A1 Semiconductor device
03/01/1995EP0641025A1 Integrated circuit gate arrays
03/01/1995EP0641024A2 Semiconductor power device
03/01/1995EP0641022A2 Isolation structure and method for making same
03/01/1995EP0641021A2 Particle analysis of notched wafers
03/01/1995EP0641020A2 Multiple-scan method for wafer particle analysis
03/01/1995EP0641019A2 A flexible printed polymer lead-frame
03/01/1995EP0641018A1 Manufacturing method of semiconductor device and thin film transistor with a recrystallized thin semiconductor film
03/01/1995EP0641017A1 Method and apparatus for semiconductor device processing
03/01/1995EP0641016A1 A modified radiant heat source with isolated optical zones
03/01/1995EP0641014A1 Plasma reactor for deposition or etching process
03/01/1995EP0641013A2 High density plasma CVD and etching reactor
03/01/1995EP0641011A2 An electron beam apparatus
03/01/1995EP0640982A2 Non-volatile semiconductor memory device and data programming method
03/01/1995EP0640975A2 Memory in which improvement is made as regards a precharge operation of data readout routes
03/01/1995EP0640920A1 Boundary-scan-based system and method for test and diagnosis
03/01/1995EP0640918A1 Semiconductor integrated circuit memory device
03/01/1995EP0640880A1 Alignment of wafers for lithographic patterning
03/01/1995EP0640853A1 Hybrid type integrated optical device having double-layered substrate
03/01/1995EP0640610A2 Liquid indium source
03/01/1995EP0640368A1 Chemical purification for semiconductor processing by partial condensation
03/01/1995EP0640271A1 Method, apparatus and product for surface mount solder joints.
03/01/1995EP0640248A1 Epitaxial ohmic contact for integrated heterostructure of Group II-VI semiconductor materials and method of fabricating same
03/01/1995EP0640245A1 Bumpless bonding process having multilayer metallization
03/01/1995EP0640244A1 Plasma treatment apparatus and method in which a uniform electric field is induced by a dielectric window.
03/01/1995EP0640151A1 Solder bumping of integrated circuit die.
03/01/1995EP0640120A1 Etching compositions
03/01/1995EP0563113B1 Preventing of via poisoning by glow discharge induced desorption
03/01/1995EP0532543B1 Sog with moisture resistant protective capping layer
03/01/1995EP0386121B1 Improved zone melt recrystallization apparatus
03/01/1995CN1099519A Semiconductors circuit and method of fabrication the same
03/01/1995CN1099517A Method of and apparatus for molding resin to seal electronic parts
03/01/1995CN1099434A Process for producing rods or blocks of semiconductor material which expands on solidification by crystallization of a melt produced from granular material, and also an apparatus for carrying out.....
03/01/1995CN1027778C Method for carrying out interconnection of semiconductor devices by ion implantation
02/1995
02/28/1995US5394403 Fully testable chip having self-timed memory arrays
02/28/1995US5394375 Row decoder for driving word line at a plurality of points thereof
02/28/1995US5394372 Semiconductor memory device having charge-pump system with improved oscillation means
02/28/1995US5394365 Charge pump circuit having an improved charge pumping efficiency
02/28/1995US5394360 Non-volatile large capacity high speed memory with electron injection from a source into a floating gate
02/28/1995US5394359 MOS integrated circuit with adjustable threshold voltage
02/28/1995US5394357 Non-volatile semiconductor memory device
02/28/1995US5394356 Process for forming an FET read only memory device
02/28/1995US5394354 Semiconductor memory and its layout design
02/28/1995US5394348 Control system for semiconductor circuit testing system
02/28/1995US5394337 Method for wire routing of a semiconductor integrated circuit and apparatus for implementing the same
02/28/1995US5394303 Semiconductor device
02/28/1995US5394298 Semiconductor devices
02/28/1995US5394294 Self protective decoupling capacitor structure
02/28/1995US5394258 Active matrix display screen with storage capacitors formed of conductive blocks, semiconductive material, nonconductive material, and capacitive lines
02/28/1995US5394246 Bonding wire inspection apparatus and method
02/28/1995US5394103 Field programmable gate array
02/28/1995US5394032 Programming details of a programmable circuit
02/28/1995US5394013 Semiconductor device with an elevated bonding pad
02/28/1995US5394012 Semiconductor device and manufacturing method of the same
02/28/1995US5394010 Semiconductor assembly having laminated semiconductor devices
02/28/1995US5394009 Tab semiconductor package with cushioned land grid array outer lead bumps
02/28/1995US5394007 Isolated well and method of making
02/28/1995US5394002 Erasable programmable memory
02/28/1995US5394001 Nonvolatile semiconductor memory device having reduced resistance value for the common source wiring region
02/28/1995US5394000 Trench capacitor structure
02/28/1995US5393999 SiC power MOSFET device structure
02/28/1995US5393998 Semiconductor memory device containing junction field effect transistor
02/28/1995US5393996 Integrated semiconductor configuration
02/28/1995US5393993 Buffer structure between silicon carbide and gallium nitride and resulting semiconductor devices
02/28/1995US5393992 Semiconductor thin film transistor with gate controlled offset portion
02/28/1995US5393988 Mask and charged particle beam exposure method using the mask
02/28/1995US5393987 Dose modulation and pixel deflection for raster scan lithography
02/28/1995US5393986 Ion implantation apparatus
02/28/1995US5393984 Magnetic deflection system for ion beam implanters
02/28/1995US5393953 Electron-beam heating apparatus and heating method thereof
02/28/1995US5393715 Aluminum nitride sintered body and method of preparing the same
02/28/1995US5393712 Process for forming low dielectric constant insulation layer on integrated circuit structure
02/28/1995US5393711 Bonding upper and lower doped semiconductor bodies using silicon fusion, forming grooves, etching, applying passivation, metal coating
02/28/1995US5393709 Method of making stress released VLSI structure by the formation of porous intermetal layer
02/28/1995US5393708 Depositing 1st insulator layer over patterns conductive layer, covering with vapor deposited silicon oxide, anisotropically etching, depositing 2nd insulator layer, covering with spin-on glass, curing, etching, depositing top dielectric layer
02/28/1995US5393707 Semiconductor - slice cleaving
02/28/1995US5393706 Integrated partial sawing process
02/28/1995US5393705 Molded semiconductor device using intermediate lead pattern on film carrier formed from lattice pattern commonly available for devices and process of fabrication thereof
02/28/1995US5393704 Self-aligned trenched contact (satc) process
02/28/1995US5393703 Using electroconductive alloy containing aluminum with controlled low concentrations of nickel and chromium (silicon-free) as connector
02/28/1995US5393702 Via sidewall SOG nitridation for via filling
02/28/1995US5393699 Deposited film formation method utilizing selective deposition by use of alkyl aluminum hydride
02/28/1995US5393698 Method for fabricating semiconductor devices
02/28/1995US5393697 Composite bump structure and methods of fabrication
02/28/1995US5393696 Method for forming multilayer indium bump contacts
02/28/1995US5393694 Advanced process for recessed poly buffered locos
02/28/1995US5393693 "Bird-beak-less" field isolation method
02/28/1995US5393692 Recessed side-wall poly plugged local oxidation
02/28/1995US5393691 Fabrication of w-polycide-to-poly capacitors with high linearity
02/28/1995US5393690 Method of making semiconductor having improved interlevel conductor insulation
02/28/1995US5393689 Forming semiconductor substrate of first conductivity type, doping surface regions to varying degrees, forming gate dielectric layer of second conductivity type
02/28/1995US5393688 Method of manufacturing a stacked capacitor DRAM
02/28/1995US5393687 Mismatching grain boundaries between first and second polycrystalline silicon layers to slow diffusion of dopants into substrates