Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
11/2005
11/10/2005US20050249004 Semiconductor memory device and driving method thereof
11/10/2005US20050249003 Semiconductor memory device for reducing cell area
11/10/2005US20050249002 Integrated semiconductor memory
11/10/2005US20050249000 Semiconductor memory device for testifying over-driving quantity depending on position
11/10/2005US20050248999 Memory card and memory controller
11/10/2005US20050248997 Semiconductor memory device for controlling output timing of data depending on frequency variation
11/10/2005US20050248996 Integrated circuit for stabilizing a voltage
11/10/2005US20050248995 Memory system and method for two step memory write operations
11/10/2005US20050248994 Memory system for network broadcasting applications and method for operating the same
11/10/2005US20050248986 High data rate write process for non-volatile flash memories
11/10/2005US20050248977 Resistive cell structure for reducing soft error rate
11/10/2005US20050248976 Dynamic random access memory cell leakage current detector
11/10/2005US20050248672 Semiconductor memory device
11/10/2005US20050248387 Boosted voltage generator
11/10/2005US20050248377 Clock capture in clock synchronization circuitry
11/10/2005US20050248375 Semiconductor memory device with ability to adjust impedance of data output driver
11/10/2005US20050248362 Semiconductor memory device with on-die termination circuit
11/10/2005US20050247981 Memory device having shielded access lines
11/10/2005DE102005017087A1 Datenausleseschaltung und Halbleiterbauteil mit einer solchen Data read-out circuit and semiconductor device with such a
11/10/2005DE102005011859A1 Ein Entwurf eines dreifach redundanten Latches mit niedriger Verzögerungszeit A design of a triple redundant latches with low delay time
11/10/2005DE102005010796A1 Semiconductor memory has leakage controller to reduce charge transfer between storage circuit and bit line, before reading data from memory cell and storage circuit to generate read voltage for read circuit, based on stored data
11/10/2005DE102004017863A1 Schaltung Circuit
11/09/2005EP1594140A1 Semiconductor device and method for controlling semiconductor device
11/09/2005EP1419507B1 Method and device for testing semiconductor memory devices
11/09/2005CN2739765Y USB playback device
11/09/2005CN1695305A Synchronous mirror delay (SMD) circuit and method including a ring oscillator for timing coarse and fine delay intervals
11/09/2005CN1695249A Semiconductor method
11/09/2005CN1695205A Semiconductor memory
11/09/2005CN1695202A Semiconductor storage device
11/09/2005CN1695199A Method and apparatus for setting and compensating read latency in a high speed DRAM
11/09/2005CN1694253A Semiconductor memory device with on-die termination circuit
11/09/2005CN1694181A Synchronous memory device
11/09/2005CN1694180A Multi-port memory device having serial i/o interface
11/09/2005CN1694179A Delay locked loop device
11/09/2005CN1694177A Semiconductor memory having variable memory size and method for refreshing the same
11/09/2005CN1694176A Multi-port memory device with global data bus connection circuit
11/09/2005CN1694175A Control chip of memory card
11/09/2005CN1226749C Semiconductor memory and its access method
11/09/2005CN1226748C Semiconductor storing device
11/09/2005CN1226746C High speed multiplex first-in first-out storage structure
11/09/2005CN1226745C Memory data bus structure and method for structuring multi-width character memory
11/08/2005US6963989 Method and apparatus for adjusting data hold timing of an output circuit
11/08/2005US6963962 Memory system for supporting multiple parallel accesses at very high frequencies
11/08/2005US6963956 Apparatus and method for pipelined memory operations
11/08/2005US6963518 Semiconductor memory having a pulse generator for generating column pulses
11/08/2005US6963517 Parallel asynchronous propagation pipeline structure to access multiple memory arrays
11/08/2005US6963516 Dynamic optimization of latency and bandwidth on DRAM interfaces
11/08/2005US6963514 Method for testing an integrated semiconductor memory, and integrated semiconductor memory
11/08/2005US6963511 Semiconductor integrated circuit
11/08/2005US6963509 Page buffer having dual register, semiconductor memory device having the same, and program method thereof
11/08/2005US6963505 Method circuit and system for determining a reference voltage
11/08/2005US6963499 Static RAM with flash-clear function
11/08/2005US6963103 SRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators
11/03/2005WO2005104132A1 Electronic circuit with memory for which a threshold level is selected
11/03/2005WO2005101977A2 Multi-factor security system with portable devices and security kernels
11/03/2005US20050243644 Semiconductor device
11/03/2005US20050243643 Semiconductor memory device invalidating improper control command
11/03/2005US20050243642 Memory device having different burst order addressing for read and write operations
11/03/2005US20050243641 Input circuit for memory device
11/03/2005US20050243638 Memory device tester and method for testing reduced power states
11/03/2005US20050243633 Memory circuit and method for providing an item of information for a prescribed period of time
11/03/2005US20050243629 Apparatus for controlling self-refresh period in memory device
11/03/2005US20050243628 Semiconductor memory device with MOS transistors, each including a floating gate and a control gate, a control method thereof, and a memory card including the same
11/03/2005US20050243627 Semiconductor memory device with auto refresh to specified bank
11/03/2005US20050243626 Refreshing data stored in a flash memory
11/03/2005US20050243624 Semiconductor memory device capable of controlling drivability of overdriver
11/03/2005US20050243622 Nonvolatile semiconductor memory device that achieves speedup in read operation
11/03/2005US20050243621 Semiconductor memory device
11/03/2005US20050243620 Non-volatile semiconductor memory device
11/03/2005US20050243619 Device authentication
11/03/2005US20050243617 Memory device
11/03/2005US20050243615 Buffer device for a clock enable signal used in a memory device
11/03/2005US20050243614 Apparatus and method for data outputting
11/03/2005US20050243612 Asynchronous request/synchronous data dynamic random access memory
11/03/2005US20050243608 Input circuit for a memory device
11/03/2005US20050243607 Data output controller in semiconductor memory device and control method thereof
11/03/2005US20050243606 Nonvolatile memory cells with buried channel transistors
11/03/2005US20050243591 Apparatus and methods for optically-coupled memory systems
11/03/2005US20050243590 Apparatus and methods for optically-coupled memory systems
11/03/2005US20050243589 Apparatus and methods for optically-coupled memory systems
11/03/2005US20050242864 Semiconductor device, semiconductor system, and digital delay circuit
11/03/2005US20050242853 Synchronous semiconductor memory device for reducing power consumption
11/03/2005US20050242833 On-die termination impedance calibration device
11/03/2005US20050242832 Apparatus for calibrating termination voltage of on-die termination
11/03/2005US20050242829 Circuit module
11/03/2005DE19844968B4 Leseverstärkerschaltung und Verfahren zum Betreiben der Leseverstärkerschaltung The sense amplifier circuit and method of operating the sense amplifier circuit
11/03/2005DE10339787B4 Speichermodul Memory module
11/03/2005DE102005017686A1 Phase-locked loop for communication between integrated circuit systems, has charge pump receiving control signals generated in response to comparison of reference clock signal and feedback signal
11/03/2005DE102004041729A1 Integrated module for output of output signals e.g. in computing systems, uses level change minimizing function for signals being outputted
11/03/2005DE102004015890A1 Memory system for e.g. laptop computer, has set of volatile memory modules and one nonvolatile memory module that stores identifiers, which indicate assignment of volatile memory modules` characteristics in set of volatile memory modules
11/02/2005CN1692452A Semiconductor device and method of controlling the semiconductor device
11/02/2005CN1692451A Semiconductor memory device and method for controlling semiconductor memory device
11/02/2005CN1692448A Method of recovering overerased bits in a memory device
11/02/2005CN1692363A Information processing system, information processing apparatus and information processing method, as well as program and recording medium
11/02/2005CN1691199A Use of memory disk and protein fingerprint in electronic medical record
11/02/2005CN1691198A Vehicle-mounted mobile MP3 player
11/02/2005CN1691197A Memory with low and fixed pre-charge loading
11/02/2005CN1691196A Memory device including self-ID information
11/02/2005CN1691195A Mobile memory device and method for improving data access speed
11/02/2005CN1690721A Circuit and method for high speed sensing