Patents
Patents for G11C 17 - Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards (10,133)
09/2001
09/06/2001US20010019280 Method and circuit to perform a trimming phase
09/05/2001CN1311898A Scaleable integrated data processing device
09/04/2001US6285619 Memory cell
08/2001
08/30/2001US20010017800 Cell array region of a NOR-type mask ROM device and fabricating method therefor
08/30/2001US20010017546 Antifuse repair circuit
08/29/2001CN1310847A Electronic test memory device
08/28/2001US6282129 Memory devices and memory reading methods
08/28/2001US6282114 Low consumption ROM
08/28/2001US6281739 Fuse circuit and redundant decoder
08/22/2001EP1126524A2 Circuit and method for trimming integrated circuits
08/22/2001EP1125297A1 Comparators, memory devices, comparison methods and memory reading methods
08/21/2001US6278651 High voltage pump system for programming fuses
08/21/2001US6278649 Bank selection structures for a memory array, including a flat cell ROM array
08/21/2001US6278629 Read-only memory and method for fabricating the same
08/21/2001CA2325810C Method and system for file system management using a flash-erasable, programmable, read-only memory
08/16/2001US20010013805 Low current redundancy anti -fuse apparatus
08/16/2001EP1123556A1 Fuse circuit having zero power draw for partially blown condition
08/14/2001US6275412 Common flash interface implementation for a simultaneous operation flash memory device
08/14/2001US6274410 Method of programming a semiconductor memory
08/09/2001WO2001057602A1 Method and system for recording of information on a holographic medium
08/09/2001WO2001057523A1 Structure identification methods using mass measurements
08/09/2001WO2001056955A1 Nonredundant split/pool synthesis of combinatorial libraries
08/09/2001US20010011921 Internal power-source potential supply circuit, step-up potential generating system, output potential supply circuit, and semiconductor memory
08/09/2001CA2396755A1 Structure identification methods using mass measurements
08/09/2001CA2396740A1 Nonredundant split/pool synthesis of combinatorial libraries
08/08/2001CN1307404A Phase-adjusting system
08/07/2001USRE37311 Parallel type nonvolatile semiconductor memory device and method of using the same
08/07/2001US6272061 Semiconductor integrated circuit device having fuses and fuse latch circuits
08/07/2001US6272051 Nonvolatile semiconductor memory device having a reference cell array
08/07/2001US6271091 Method of fabricating flash memory cell
08/01/2001EP1120828A1 Method and circuit to perform a trimming phase on electronic circuits
08/01/2001EP0700598B1 Negative voltage generator for flash eprom design
07/2001
07/31/2001US6269017 Multi level mask ROM with single current path
07/31/2001US6268760 Hysteretic fuse control circuit with serial interface fusing
07/26/2001US20010009527 Semiconductor memory device
07/25/2001EP0740837B1 Method and circuitry for storing discrete amounts of charge in a single memory element
07/24/2001US6266291 Voltage independent fuse circuit and method
07/24/2001US6266290 Programmable latches that include non-volatile programmable elements
07/19/2001US20010008382 Low current redundancy anti-fuse method and apparatus
07/17/2001US6263477 Layout information generating apparatus and method thereof
07/17/2001US6262926 Nonvolatile semiconductor memory device
07/17/2001US6262924 Programmable semiconductor memory device
07/17/2001US6262919 Pin to pin laser signature circuit
07/12/2001US20010007431 Low current redundancy anti-fuse method and apparatus
07/11/2001EP1115120A2 Method and apparatus for temperature compensation of read-only memory
07/11/2001EP0700570B1 Flash eprom with block erase flags for over-erase protection
07/10/2001US6259622 Two bit per cell ROM using a two phase current sense amplifier
07/10/2001US6259270 Semiconductor programmable test arrangement such as an antifuse ID circuit having common programming switches
07/10/2001US6259143 Semiconductor memory device of NOR type mask ROM and manufacturing method of the same
07/05/2001US20010006543 Phase adjustment technique
07/05/2001US20010006351 Low current redundancy anti-fuse method and apparatus
07/04/2001EP1113452A2 Internal protection circuit and method for on chip programmable poly fuses
07/03/2001US6256642 Method and system for file system management using a flash-erasable, programmable, read-only memory
07/03/2001US6256257 Memory device including a burn-in controller for enabling multiple wordiness during wafer burn-in
07/03/2001US6256239 Redundant decision circuit for semiconductor memory device
07/03/2001US6255894 Low current redundancy anti-fuse method and apparatus
06/2001
06/28/2001US20010005335 Row redundancy circuit using a fuse box independent of banks
06/27/2001EP1111618A1 Read/write protected electrical fuse architecture
06/26/2001US6252813 Read only memory precharging circuit and method
06/26/2001US6252797 Masked ROM and manufacturing process therefor
06/26/2001US6252293 Laser antifuse using gate capacitor
06/21/2001WO2001045111A1 Photorefractive holographic recording media
06/21/2001CA2394541A1 Photorefractive holographic recording media
06/19/2001US6249850 Semiconductor memory device and method for copying data stored therein
06/19/2001US6249477 Semiconductor memory device
06/19/2001US6249472 Semiconductor memory device with antifuse
06/14/2001US20010003508 Semiconductor memory device capable of performing stable read operation and read method thereof
06/13/2001EP1105876A1 Method and apparatus for built-in self test of integrated circuits
06/13/2001CN1067174C Sense amplifier for semiconductor memory device
06/12/2001US6246621 Semiconductor memory device generating accurate internal reference voltage
06/12/2001US6246243 Semi-fusible link system
06/07/2001WO2001040947A1 Fuse latch having multiplexers with reduced sizes and lower power consumption
06/07/2001US20010002887 Electronic memory device
06/07/2001DE10058030A1 Integrated circuit e.g. read only memory, has several non-volatile memory locations to store certain data set and has logic to calculate test code
06/06/2001EP1104578A1 Universal memory element with systems employing same and apparatus and method for reading, writing and programming same
06/05/2001US6243285 ROM-embedded-DRAM
06/05/2001US6243284 Multivalued mask read-only memory
06/05/2001US6243283 Impedance control using fuses
06/05/2001US6242790 Using polysilicon fuse for IC programming
05/2001
05/31/2001WO2001039196A1 Memory device
05/31/2001DE19955779A1 Data storage device especially semiconductor memory, such as RAM or ROM
05/29/2001US6240034 Programmable latches that include non-volatile programmable elements
05/29/2001US6240033 Antifuse circuitry for post-package DRAM repair
05/29/2001US6240022 Non-volatile semiconductor memory device with block erase function
05/29/2001US6240014 Semiconductor memory device
05/25/2001WO2001037344A1 Secure rom memory cell and method for production thereof
05/25/2001WO2001037284A1 Memory cell
05/23/2001EP1102320A1 Security ROM memory cell and manufacturing method therefor
05/23/2001EP1102280A2 Semiconductor memory device
05/23/2001EP0928484B1 Charge sharing detection circuit for anti-fuses
05/23/2001EP0665558B1 Method for programming and testing a non-volatile memory
05/23/2001DE10053906A1 Synchronous mask ROM component has word decoder that holds word signal while internal clock signal is deactivated, and which outputs control signal for transferring read data
05/22/2001US6236587 Read-only memory and read-only memory devices
05/16/2001EP1100125A1 Integrated circuit with identification signal writing circuitry distributed on multiple metal layers
05/15/2001US6233189 Semiconductor memory device
05/15/2001US6233186 Memory device having reduced precharge time
05/15/2001US6233168 Non-volatile semiconductor memory capable of reducing parasitic current
05/15/2001US6232801 Comparators and comparison methods
05/10/2001US20010000992 Methods for forming and programming aligned fuses disposed in an integrated circuit
05/09/2001CN1294759A Memory unit device and its mfg. method
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