Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/1996
08/06/1996US5544106 Semiconductor memory device with redundant decoder available for test sequence on redundant memory cells
08/06/1996US5544105 Static semiconductor memory device having circuitry for lowering potential of bit lines at commencement of data writing
08/06/1996US5544102 Semiconductor memory device including stabilizing capacitive elements each having a MOS capacitor structure
08/06/1996US5544101 Memory device having a latching multiplexer and a multiplexer block therefor
08/06/1996US5544097 SRAM memory cell with reduced internal cell voltage
08/06/1996US5544096 Semiconductor memory device having volatile storage unit and non-volatile storage unit
08/06/1996US5544093 Dual port multiple block memory capable of time divisional operation
08/06/1996US5543750 Bootstrap circuit
08/06/1996US5543738 Multi-stage sense amplifier for read-only memory having current comparators
08/01/1996WO1996023307A1 Decoded wordline driver with positive and negative voltage modes
07/1996
07/31/1996EP0724267A1 Programmable multibit register for coincidence and jump operations and coincidence fuse cell
07/31/1996EP0724266A1 Successive approximation method for sensing multiple-level non-volatile memory cells and sensing circuit using such method
07/31/1996EP0724265A2 Ferroelectric random-access memory
07/31/1996CN1127919A Boosting coltage circuit used in active cycle of a semiconductor memory device
07/30/1996US5541888 Optical random access memory
07/30/1996US5541886 Method and apparatus for storing control information in multi-bit non-volatile memory arrays
07/30/1996US5541885 High speed memory with low standby current
07/30/1996US5541884 Method and circuit for suppressing data loading noise in nonvolatile memories
07/30/1996US5541883 Integrated circuit
07/30/1996US5541878 Writable analog reference voltage storage device
07/30/1996US5541873 Nonvolatile memory
07/30/1996US5541872 Folded bit line ferroelectric memory device
07/30/1996US5541871 Nonvolatile ferroelectric-semiconductor memory
07/30/1996US5541870 Ferroelectric memory and non-volatile memory cell for same
07/30/1996US5541868 Annular GMR-based memory element
07/30/1996US5541529 Field programmable gate array transferring signals at high speed
07/30/1996US5541427 SRAM cell with capacitor
07/30/1996US5541422 Tunnel diode with several permanent switching states
07/30/1996US5540977 Microelectronic component
07/25/1996DE19601847A1 Memory cell wiring circuit
07/25/1996DE19600804A1 Internal voltage generator circuit for semiconductor memory e.g. DRAM
07/24/1996EP0723297A2 Semiconductor memory device and method of making the same
07/24/1996EP0723269A2 Semiconductor memory device having positive feedback sense amplifier
07/24/1996EP0723268A2 DRAM data transfer system
07/23/1996US5539703 Dynamic memory device including apparatus for controlling refresh cycle time
07/23/1996US5539701 Sense circuit for semiconductor memory devices
07/23/1996US5539700 Column selection circuit of semiconductor memory with transfer gate
07/23/1996US5539695 Fast access multi-bit random access memory
07/23/1996US5539693 Method of controlling semiconductor storage circuit
07/23/1996US5539692 Semiconductor memory and method of setting type
07/23/1996US5539691 Semiconductor memory device and method for reading and writing data therein
07/23/1996US5539690 Write verify schemes for flash memory with multilevel cells
07/23/1996US5539353 Circuit for compensating for potential voltage drops caused by parasitic interconnection resistance
07/23/1996US5539344 Phase-locked circuit and interated circuit device
07/23/1996US5539335 Output buffer circuit for semiconductor device
07/23/1996US5539279 Ferroelectric memory
07/18/1996DE19600288A1 Sense amplifier circuit for data read=out from memory
07/18/1996DE19547294A1 Semiconductor memory device with data rewrite facility for DRAM
07/17/1996CN1032337C Circuit for detecting refresh address signals of semiconductor memory device
07/16/1996US5537565 Dynamic memory system having memory refresh
07/16/1996US5537564 Technique for accessing and refreshing memory locations within electronic storage devices which need to be refreshed with minimum power consumption
07/16/1996US5537361 Semiconductor memory device and memory access system using a four-state address signal
07/16/1996US5537359 Memory device
07/16/1996US5537354 Semiconductor memory device and method of forming the same
07/16/1996US5537353 Low pin count-wide memory devices and systems and methods using the same
07/16/1996US5537352 Integrated semiconductor memory configuration
07/16/1996US5537351 Semiconductor memory device carrying out input and output of data in a predetermined bit organization
07/16/1996US5537348 Memory device
07/16/1996US5537347 Dynamic semiconductor memory device
07/16/1996US5537346 Semiconductor memory device obtaining high bandwidth and signal line layout method thereof
07/16/1996US5537243 All-optical flip-flop
07/16/1996US5537222 Image edit apparatus providing synchronization between image data and edit commands
07/16/1996US5537073 Circuitry and method for clamping a boost signal
07/16/1996US5537066 Flip-flop type amplifier circuit
07/16/1996US5537060 Output buffer circuit for memory device
07/16/1996US5537058 Semiconductor device having high speed input circuit
07/16/1996US5537053 Integrated circuit
07/16/1996US5536960 VLSIC semiconductor memory device with cross-coupled inverters with improved stability to errors
07/16/1996US5536947 Electrically erasable, directly overwritable, multibit single cell memory element and arrays fabricated therefrom
07/11/1996WO1996021278A1 Interleaved and sequential counter
07/11/1996DE19548936A1 Datenausgabepufferschaltung für eine Halbleiterspeichervorrichtung Data output buffer circuit for a semiconductor memory device
07/11/1996DE19547796A1 Erhöhungsspannungsschaltkreis zur Benutzung im aktiven Zyklus einer Halbleiterspeichervorrichtung Boosting voltage circuit for use in the active cycle of a semiconductor memory device
07/10/1996EP0721250A2 Low power oscillator
07/10/1996EP0721191A2 Ferroelectric memory and method for controlling operation of the same
07/10/1996EP0721190A2 Ferroelectric memory and method for controlling operation of the same
07/10/1996EP0721189A2 Ferroelectric memory and method for controlling operation of the same
07/09/1996US5535328 Method of operating a computer system
07/09/1996US5535174 Random access memory with apparatus for reducing power consumption
07/09/1996US5535171 Data output buffer of a semiconducter memory device
07/09/1996US5535170 Sequential access memory that can have circuit area reduced
07/09/1996US5535169 Semiconductor memory device
07/09/1996US5535167 Non-volatile memory circuits, architecture
07/09/1996US5535163 Semiconductor memory device for inputting and outputting data in a unit of bits
07/09/1996US5535159 Multiport memory cell circuit having read buffer for reducing read access time
07/09/1996US5535156 Transistorless, multistable current-mode memory cells and memory arrays and methods of reading and writing to the same
07/09/1996US5535155 SRAM cell having load thin film transistors
07/09/1996US5535153 Semiconductor device
07/09/1996US5534817 Voltage generating circuit
07/09/1996US5534800 Sense amplifier, SRAM, and microprocessor
07/09/1996US5534724 Semiconductor memory device
07/09/1996US5534712 Electrically erasable memory elements characterized by reduced current and improved thermal stability
07/09/1996US5534711 Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom
07/04/1996WO1996020482A1 Burst edo memory device
07/04/1996WO1996020481A1 Distributed write data drivers for burst access memories
07/04/1996WO1996020480A1 System adapted to receive multiple memory types
07/04/1996WO1996020479A1 Burst edo memory device address counter
07/04/1996WO1996020478A1 Synchronous burst extended data out dram
07/04/1996WO1996020477A1 Burst edo memory device with maximized write cycle timing
07/04/1996WO1996020446A1 Main memory system with multiple data paths
07/04/1996WO1996020443A1 Error management processes for flash eeprom memory arrays