Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
07/1996
07/04/1996DE19600049A1 Selbstbootstrapvorrichtung Selbstbootstrapvorrichtung
07/03/1996EP0720295A2 Semiconductor device
07/03/1996EP0720291A2 Delay circuit device
07/03/1996EP0720176A2 Method of multilevel dram sense and restore
07/03/1996EP0720175A1 Sense amplifier
07/03/1996EP0720174A2 A multi-valued semiconductor memory device
07/03/1996EP0720173A1 Latch type static memory element
07/03/1996EP0720172A2 Ferroelectric memory cell and reading/writing method thereof
07/03/1996EP0720171A2 Ferroelectric memory device
07/03/1996EP0720170A2 Improved on-chip voltage multiplier for semiconductor memories
07/03/1996CN1125887A Semiconductor memory device with reduced data bus line load
07/02/1996US5532970 Data storage apparatus
07/02/1996US5532969 Clocking circuit with increasing delay as supply voltage VDD
07/02/1996US5532968 Self refresh control circuit for memory cell array
07/02/1996US5532967 Method for suppressing peak current in a video RAM and in a serial access memory block
07/02/1996US5532961 Semiconductor memory device having extended data out function
07/02/1996US5532958 Integrated circuit memory
07/02/1996US5532957 Field reconfigurable logic/memory array
07/02/1996US5532956 Memory cell structure for semiconductor device and dynamic semiconductor memory device
07/02/1996US5532955 Method of multilevel dram sense and restore
07/02/1996US5532953 Ferroelectric memory sensing method using distinct read and write voltages
07/02/1996US5532915 Method and apparatus for providing an ultra low power regulated negative charge pump
07/02/1996US5532640 Voltage generator circuit generating stable negative potential
07/02/1996US5532628 Fast comparator circuit
07/02/1996US5532620 Input buffer circuit capable of corresponding to variation of operating voltage in semiconductor integrated circuit
07/02/1996US5532618 Stress mode circuit for an integrated circuit with on-chip voltage down converter
07/02/1996US5532578 Reference voltage generator utilizing CMOS transistor
06/1996
06/27/1996DE19547782A1 Semiconductor memory device for microprocessor
06/26/1996EP0718977A2 Output driver circuitry with selectable limited output high voltage
06/26/1996EP0718888A2 Method for integrating analog and digital functional components, and resulting semiconductor chip including an integrated DRAM
06/26/1996EP0718848A2 Burst transmission semiconductor memory device
06/26/1996EP0718846A2 Single ended simplex dual port memory cell
06/26/1996EP0718824A1 Giant magnetoresistive information recording medium, and associated recording and reproducing method and apparatus
06/26/1996EP0718767A1 Semiconductor memory device incorporating redundancy memory cells
06/26/1996CN1125349A Device patching fault dynamic RAM by using cache buffer memory
06/25/1996US5530670 Semiconductor memory device and control method for the same
06/25/1996US5530668 Ferroelectric memory sensing scheme using bit lines precharged to a logic one voltage
06/25/1996US5530667 Ferroelectric memory device
06/25/1996US5530397 Reference voltage generating circuit of semiconductor memory device
06/25/1996US5530379 Output buffer circuit that can be shared by a plurality of interfaces and a semiconductor device using the same
06/25/1996US5530263 Three dot computing elements
06/25/1996US5529945 Methods for fabricating a multi-bit storage cell
06/23/1996CA2162067A1 Method for integrating analog and digital functional components, and resulting semiconductor chip including an integrated dram
06/20/1996WO1996018998A1 A method for programming a single eprom or flash memory cell to store multiple levels of data
06/19/1996EP0717415A2 Semiconductor memory device
06/19/1996EP0717414A2 Semiconductor memory
06/19/1996EP0717413A2 Memory cell and wordline driver for embedded dram in ASIC process
06/19/1996EP0717412A2 Semiconductor memory device
06/19/1996CN1124866A Spin valve magne toresistive sensor with free layer exchange biasing, process for making the sensor, and magnetic recording system using the sensor
06/18/1996US5528552 Dynamic random access memory device with sense amplifiers serving as cache memory independent of row address buffer unit for high-speed sequential access
06/18/1996US5528549 Apparatus, systems and methods for distributed signal processing
06/18/1996US5528545 Semiconductor memory device
06/18/1996US5528544 Semiconductor memory device having high speed sense amplifier
06/18/1996US5528542 Sense amplifier
06/18/1996US5528538 Voltage generating circuit in semiconductor integrated circuit
06/18/1996US5528535 Semiconductor memory device
06/18/1996US5528534 High-density read-only memory employing multiple bit-line interconnection
06/18/1996US5528440 Spin valve magnetoresistive element with longitudinal exchange biasing of end regions abutting the free layer, and magnetic recording system using the element
06/18/1996US5528178 Sense and hold amplifier
06/18/1996US5528130 Intermediate potential generating circuit having output stabilizing circuit
06/18/1996US5528129 Semiconductor integrated circuit for generating constant internal voltage
06/13/1996DE19545743A1 Semiconductor memory error-bit safeguard device for dynamic random access memory
06/12/1996EP0315157B1 Semiconductor memory system
06/11/1996US5526506 Computer system having an improved memory architecture
06/11/1996US5526320 Burst EDO memory device
06/11/1996US5526319 Memory with adiabatically switched bit lines
06/11/1996US5526318 Semiconductor memory with power-on reset controlled latched row line repeaters
06/11/1996US5526313 Semiconductor device
06/11/1996US5526310 Memory with latched output
06/11/1996US5526308 Nonvolatile semiconductor memory device
06/11/1996US5526306 Semiconductor memory device and method of fabricating the same
06/11/1996US5526305 Two-transistor dynamic random-access memory cell
06/11/1996US5526302 Semiconductor memory device having volatile storage unit and non-volatile storage unit
06/11/1996US5525923 Single event upset immune register with fast write access
06/11/1996US5525820 Semiconductor memory cell
06/06/1996WO1996017355A1 A synchronous nand dram architecture
06/05/1996EP0715312A1 Monolitically integrated generator of a plurality of voltage values
06/05/1996EP0715311A2 A semiconductor memory apparatus
06/05/1996EP0715310A2 Improvements in or relating to memory devices
06/05/1996EP0714545A1 Improved data output buffer
06/05/1996EP0472209B1 Semiconductor memory device having redundant circuit
06/05/1996DE19539682A1 Semiconductor memory with extended data output function esp. DRAM with EDO
06/05/1996DE19537310A1 Semiconductor memory device esp. with reduced power consumption has switch signal generator applying control signals
06/05/1996CN1031969C Common bias circuit for plurality of discreteic's each having their own bias circuitry
06/04/1996US5524228 Memory control circuit for reducing the number of row address signals
06/04/1996US5524226 Register file system for microcomputer including a decoding system for concurrently activating source and destination word lines
06/04/1996US5524096 Circuit for generating a delayed standby signal in response to an external standby command
06/04/1996US5524095 Semiconductor memory device with a substrate bias voltage generation circuit as a power supply of a word line driver circuit
06/04/1996US5524093 Semiconductor memory device having an arrangement to reduce stresses on non-selected ferroelectric capacitors while achieving high integration
06/04/1996US5524092 Multilayered ferroelectric-semiconductor memory-device
06/04/1996US5523979 Semiconductor memory device for block access applications
06/04/1996US5523978 Supply voltage detecting circuit of a semiconductor memory device
06/04/1996US5523977 Testing semiconductor memory device having test circuit
06/04/1996US5523974 Semiconductor memory device with redundant memory cell backup
06/04/1996US5523972 Method and apparatus for verifying the programming of multi-level flash EEPROM memory
06/04/1996US5523966 Memory cell and a memory device having reduced soft error
06/04/1996US5523964 Ferroelectric non-volatile memory unit
06/04/1996US5523703 Method and apparatus for controlling termination of current driven circuits
05/1996
05/30/1996WO1996016371A1 Method and structure for utilizing a dram array as second level cache memory
05/30/1996DE19541469A1 Semiconductor device with mask-programmable memory
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