G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor

Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/2004
11/11/2004	US20040223398 Method and device for a scalable memory building block
11/11/2004	US20040223396 Dynamic semiconductor memory device and bit line precharge method therefor
11/11/2004	US20040223395 Hiding error detecting/correcting latency in dynamic random access memory (DRAM)
11/11/2004	US20040223393 Skewed sense AMP for variable resistance memory sensing
11/11/2004	US20040223392 Semiconductor memory device
11/11/2004	US20040223382 Magnetic memory
11/11/2004	US20040223378 Latch-up prevention for memory cells
11/11/2004	US20040223376 Integrated memory having a voltage generator circuit for generating a voltage supply for a read/write amplifier
11/11/2004	US20040223370 Methods and circuits for programming of a semiconductor memory cell and memory array using a breakdown phenomenon in an ultra-thin dielectric
11/11/2004	US20040223369 Column decoder circuit and method for connecting data lines with bit lines in a semiconductor memory device
11/11/2004	US20040223368 Semiconductor device
11/11/2004	US20040223367 Phase detector for all-digital phase locked and delay locked loops
11/11/2004	US20040223366 Semiconductor device with non-volatile memory and random access memory
11/11/2004	US20040223365 Semiconductor device and method for inputting/outputting data simultaneously through single pad
11/11/2004	US20040223362 User RAM flash clear
11/11/2004	US20040223360 Semiconductor memory device
11/11/2004	US20040223359 Memory circuit and method for corrupting stored data
11/11/2004	US20040223357 Multiple data state memory cell
11/11/2004	US20040223355 Thin film magnetic memory device including memory cells having a magnetic tunnel junction
11/11/2004	US20040223354 Semiconductor memory device having high-speed input/output architecture
11/11/2004	US20040223031 Ink distribution assembly for an ink jet printhead
11/11/2004	US20040222831 Synchronization circuit and synchronization method
11/11/2004	US20040222829 Delay-locked loop (DLL) capable of directly receiving external clock signals
11/11/2004	US20040222828 Timing adjustment circuit and semiconductor device including the same
11/11/2004	US20040222452 Semiconductor memory device, method for driving the same and portable electronic appararus
11/11/2004	US20040222451 Semiconductor memory device with static memory cells
11/11/2004	US20040222450 MRAM architecture with a bit line located underneath the magnetic tunneling junction device
11/11/2004	US20040222437 Programming and erasing methods for an NROM array
11/11/2004	US20040222185 a combination of a gas containing a carbonyl group, a gas with a halogen element, and an electron donating gas is used as an etching gas; better etching rate and anisotropy
11/11/2004	DE10315528A1 Data memory circuit for drams has memory cells command decoder control unit and a command buffer to store commands during inadmissible command events
11/11/2004	DE102004016702A1 Dynamischer Speicher für wahlfreien Zugriff mit reduziertem Strom für die Selbstauffrischung und Verfahren zum Auffrischen eines dynamischen Speichers mit wahlfreiem Zugriff Dynamic memory for random access with reduced power for the self-refresh and method of refreshing a dynamic random-access
11/11/2004	DE102004006456A1 Integrierte Schaltung und zugehöriges Schnittstellenverfahren Integrated circuit and associated interface method
11/10/2004	EP1475805A2 Semiconductor memory device
11/10/2004	EP1475804A2 Ferroelectric memory and semiconductor memory
11/10/2004	EP1475718A2 A semiconductor memory device
11/10/2004	EP1475717A2 A data processing structure unit
11/10/2004	EP1475716A2 A data processing unit, a data processing structure unit, and a data processing structure
11/10/2004	EP1474832A1 Method and system for molecular charge storage field effect transistor
11/10/2004	EP1474807A2 Writing to a scalable mram element
11/10/2004	EP1474806A2 Antiferromagnetically stabilized pseudo spin valve for memory applications
11/10/2004	EP1474804A2 Reading circuit for reading a memory cell
11/10/2004	EP1474749A2 Method and apparatus for supplementary command bus in a computer system
11/10/2004	EP1236278A4 Method and apparatus for an n-nary logic circuit
11/10/2004	CN1545708A Method and device for testing semiconductor memory devices
11/10/2004	CN1545152A Method for preparing phase-changing film material nanometer wire
11/10/2004	CN1545098A Output device for DRAM
11/10/2004	CN1545097A Output driving strength correcting circuit and method for DRAM
11/10/2004	CN1175572C Clock signal control circuit and method and synchronous delay circuit
11/10/2004	CN1175501C Storage cell arrangement and method for producing the same
11/10/2004	CN1175425C Integrated memory with storage and reference unit
11/10/2004	CN1175424C Semiconductor integrated circuit device
11/10/2004	CN1175423C Programmable microelectronic device and methods of forming and programming same
11/10/2004	CN1175422C Ferroelectric memory device with ferroelectric capacitor
11/09/2004	USRE38647 Sense amplifier circuit
11/09/2004	US6816433 Synchronous dynamic random access memory for burst read/write operations
11/09/2004	US6816431 Magnetic random access memory using memory cells with rotated magnetic storage elements
11/09/2004	US6816428 Arrangement for voltage supply to a volatile semiconductor memory
11/09/2004	US6816426 Semiconductor device with self refresh test mode
11/09/2004	US6816425 Balanced sense amplifier control for open digit line architecture memory devices
11/09/2004	US6816422 Semiconductor memory device having multi-bit testing function
11/09/2004	US6816418 MIS semiconductor device having improved gate insulating film reliability
11/09/2004	US6816413 Nonvolatile semiconductor memory capable of generating read-mode reference current and verify-mode reference current from the same reference cell
11/09/2004	US6816411 Non-volatile semiconductor storage device composed of NAND type EEPROM and deletion verification method in non-volatile semiconductor storage device
11/09/2004	US6816409 Non-volatile semiconductor memory device and rewriting method
11/09/2004	US6816408 Memory device with multi-level storage cells
11/09/2004	US6816407 Method for storing and reading data in a multilevel nonvolatile memory, and architecture therefor
11/09/2004	US6816406 Magnetic memory configuration
11/09/2004	US6816405 Segmented word line architecture for cross point magnetic random access memory
11/09/2004	US6816403 Capacitively coupled sensing apparatus and method for cross point magnetic random access memory devices
11/09/2004	US6816402 Row and column line geometries for improving MRAM write operations
11/09/2004	US6816401 Static random access memory (SRAM) without precharge circuitry
11/09/2004	US6816399 Semiconductor memory device including ferroelectric memory formed using ferroelectric capacitor
11/09/2004	US6816398 Memory device
11/09/2004	US6816397 Bi-directional read write data structure and method for memory
11/09/2004	US6815989 Sequential activation delay line circuits and methods
11/09/2004	US6815985 Clock divider and method for dividing a clock signal in a DLL circuit
11/09/2004	US6815839 Soft error resistant semiconductor memory device
11/09/2004	US6815785 Thin film magnetic memory device and manufacturing method therefor
11/09/2004	US6815784 Magneto-resistive random access memory
11/09/2004	US6815783 Single transistor type magnetic random access memory device and method of operating and manufacturing the same
11/09/2004	US6815746 Semiconductor device and method of manufacturing the same
11/09/2004	US6815744 Microelectronic device for storing information with switchable ohmic resistance
11/09/2004	US6815705 Electrically programmable memory element with raised pore
11/09/2004	US6815322 Fabrication method of semiconductor device
11/09/2004	US6815286 Memory device
11/09/2004	US6815282 Silicon on insulator field effect transistor having shared body contact
11/09/2004	US6815248 Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in MRAM processing
11/09/2004	US6815226 Ferroelectric memory device and method of forming the same
11/09/2004	US6814429 Ink jet printhead incorporating a backflow prevention mechanism
11/04/2004	WO2004095515A2 Methods for contracting conducting layers overlying magnetoelectronic elements of mram devices
11/04/2004	WO2004095470A1 Nonvolatile semiconductor memory
11/04/2004	WO2004095469A1 Method of programming dual cell memory device to store multiple data states per cell
11/04/2004	WO2004095468A1 Semiconductor device
11/04/2004	WO2004095467A1 Semiconductor memory
11/04/2004	WO2004095466A1 Semiconductor memory
11/04/2004	WO2004095465A1 Semiconductor memory
11/04/2004	WO2004095464A1 Magnetic random access memory using improved data read out method
11/04/2004	WO2004095463A1 Method for reducing power consumption when sensing a resistive memory
11/04/2004	WO2004077438A3 Process of forming a ferroelectric memory integrated circuit
11/04/2004	WO2004055821A3 Architecture for high-speed magnetic memories

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