Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
10/1989
10/05/1989WO1988006758A3 Destination control logic for arithmetic and logic unit for digital data processor
10/05/1989DE3809633A1 Shift register-adder circuit in 54321 code
10/05/1989DE3809632A1 Shift register-adder circuit in 51111 code
10/04/1989EP0335489A2 Concurrent sorting apparatus and method
10/04/1989EP0335462A1 Data processing system with cyclic data buffering, selecting means for selecting memory addresses, suitable for use in such a system
10/03/1989US4872214 Method and apparatus for high performance division
10/03/1989US4872134 Signal processing integrated circuit for row and column addition of matrices of digital values
10/03/1989US4872133 Floating-point systolic array including serial processors
10/03/1989US4872132 Method and means for block floating point arithmetic
10/03/1989US4872131 Arithmetic-logic operation unit having high-order and low-order processing sections and selectors for control of carry flag transfer therebetween
10/03/1989US4872128 High speed data processing unit using a shift operation
09/1989
09/27/1989EP0334768A2 Logic circuit having carry select adders
09/27/1989EP0334131A2 Data processor performing operation on data having length shorter than one-word length
09/27/1989EP0334103A2 Data processing unit having a bypass circuit
09/27/1989EP0333884A1 Parallel-series multiplier circuit and its multiplier and adder stages
09/26/1989US4870681 Cryptographic method and cryptographic processor for carrying out the method
09/26/1989US4870677 Data/facsimile telephone subset apparatus incorporating electrophoretic displays
09/26/1989US4870609 High speed full adder using complementary input-output signals
09/26/1989US4870608 Method and apparatus for floating point operation
09/26/1989US4870606 Trigonometric function preprocessing system
09/26/1989US4870563 Information processing apparatus having a mask function
09/26/1989CA1260580A1 Method for optimizing the storage of video signals in a digital image transformer and digital image transformer using said method
09/26/1989CA1260560A1 Programmable logic array with single clock dynamic logic
09/26/1989CA1260559A1 Mask signal generator
09/26/1989CA1260151A1 Propagation of network queries through superior- subordinate and peer-peer data distribution relationships
09/26/1989CA1260078A1 Random sequence generators
09/21/1989WO1989008882A1 Adjustable-parameter multiplier/summer in galois bodies, and its use in a digital signal processor
09/21/1989DE3807875A1 Circuit arrangement for detecting the currents of a predeterminable count
09/20/1989EP0333599A1 Parametrie Galois field multiplier-adder and its use in a digital signal processor
09/20/1989EP0333346A2 Hard-wired circuit for sorting data
09/20/1989EP0333306A2 Integrated and programmable processor for word-wise digital signal processing
09/20/1989EP0333214A2 Comparator unit for data discrimination
09/20/1989EP0333181A2 Data string retrieval apparatus
09/20/1989EP0332845A2 Dual look ahead mask generator
09/19/1989US4868781 Memory circuit for graphic images
09/19/1989US4868778 Speed enhancement for multipliers using minimal path algorithm
09/19/1989US4868777 High speed multiplier utilizing signed-digit and carry-save operands
09/19/1989EP0316402A4 A fast median filter.
09/19/1989CA1259669A1 Method and circuit for digital frequency multiplication
09/13/1989EP0332504A1 Method for determining the structure of a cellular tree multiplier, called P.th root structure
09/13/1989EP0332415A2 Full adder with short signal propagation path
09/13/1989EP0332215A2 Operation circuit based on floating-point representation
09/13/1989EP0331789A2 Memory for a computing arrangement which operates with high precision on both floating point and fixed point numbers
09/13/1989EP0331717A1 Fast multiplier circuit
09/13/1989EP0142412B1 Device for the transformation of the appearance probability of logic vectors and for the generation of time-variable probability vector sequences
09/13/1989CN2044360U Extracting roots integrating instrument for micro computer
09/12/1989US4866715 Method of testing a modified booth multiplier, modified booth multiplier suitable for testing by means of this method, and integrated circuit comprising such a modified booth multiplier
09/12/1989US4866658 High speed full adder
09/12/1989US4866657 Adder circuitry utilizing redundant signed digit operands
09/12/1989US4866656 High-speed binary and decimal arithmetic logic unit
09/12/1989US4866655 Arithmetic processor and divider using redundant signed digit
09/12/1989US4866654 Digital multiplying circuit
09/12/1989US4866653 Circuitry for generating sums, especially scalar products
09/12/1989US4866652 Floating point unit using combined multiply and ALU functions
09/12/1989US4866651 Method and circuit arrangement for adding floating point numbers
09/12/1989US4866636 Method and apparatus for uniformly encoding data occurring with different word lengths
09/11/1989EP0197122A4 A cellular floating-point serial-pipelined multiplier.
09/08/1989WO1989008294A1 Carry generation method and apparatus
09/08/1989WO1989008293A1 Bit blitter with narrow shift register
09/07/1989DE3806570A1 Method for counting events following one another at short time intervals by means of electronic counting devices and corresponding counting devices
09/06/1989EP0331487A2 Data transfer control system
09/06/1989EP0331372A2 Method of and apparatus using floating point execption signals for controlling several processors
09/05/1989US4864544 A Ram cell having means for controlling a bidirectional shift
09/05/1989US4864529 Fast multiplier architecture
09/05/1989US4864528 Arithmetic processor and multiplier using redundant signed digit arithmetic
09/05/1989US4864527 Apparatus and method for using a single carry chain for leading one detection and for "sticky" bit calculation
09/05/1989US4864165 ECL programmable logic array with direct testing means for verification of programmed state
08/1989
08/31/1989DE3805320A1 Serial addition-subtraction circuit in decimal 1-out-of-10 code
08/31/1989DE3805319A1 Adder circuit in 51111 code
08/30/1989EP0329789A1 Galois field arithmetic unit
08/30/1989EP0067862B1 Prime or relatively prime radix data processing system
08/29/1989US4862455 Demultiplexing circuit for a multiplex signal
08/29/1989US4862405 Apparatus and method for expediting subtraction procedures in a carry/save adder multiplication unit
08/29/1989US4862404 Digital circuit for suppressing fast signal variations
08/29/1989US4862356 Method and device for sorting objects provided with a parameter, according to the value of this parameter
08/29/1989CA1258888A1 Multibit digital threshold comparator
08/29/1989CA1258886A1 Frequency divider
08/23/1989EP0329572A1 Multiplier of binary numbers having a very large number of bits
08/23/1989EP0329545A1 Device for the calculation of parity bits of a sum of two numbers
08/23/1989EP0328899A2 Parity generator circuit and method
08/23/1989EP0328871A2 Condition code prediction apparatus
08/23/1989EP0328779A2 Apparatus for branch prediction for computer instructions
08/23/1989EP0328637A1 Apparatus for computing multiplicative inverses in data encoding decoding devices
08/23/1989EP0328619A1 Apparatus and method for using a single carry chain for leading one detection and for ''sticky'' bit calculation
08/23/1989CN1035014A 汉文输入装置 Chinese language input device
08/22/1989US4860242 Precharge-type carry chained adder circuit
08/22/1989US4860241 Method and apparatus for cellular division
08/22/1989US4860240 Low-latency two's complement bit-serial multiplier
08/22/1989US4860238 Digital sine generator
08/22/1989US4860237 Scan linearity correction
08/22/1989US4860236 Cellular automaton for generating random data
08/22/1989US4860235 Arithmetic unit with alternate mark inversion (AMI) coding
08/22/1989US4860012 Integrated analog-to-digital converter
08/22/1989US4859985 Reconfigurable parameter filter having filter sections selectively operating independently on respective low precision binary numbers or together on a higher precision binary number
08/22/1989US4859874 PLA driver with reconfigurable drive
08/16/1989EP0328436A1 Method and device for the partial decoding of the header of a communication message sent by a first station towards at least a second station, especially in a motor vehicle
08/16/1989EP0328063A2 Absolute value calculating circuit having a single adder
08/16/1989EP0109426B1 Sorting technique
08/16/1989CN1034834A Judge circuit for digital circuit cutout
08/16/1989CN1034833A Frequency doubling circuit and frequency square circuit for digital circuit cutout
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