| Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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| 08/12/1987 | CN86107983A Block shifter for graphics processor |
| 08/11/1987 | US4686691 Multi-purpose register for data and control paths having different path widths |
| 08/11/1987 | US4686670 Method of switching time slots in a TDM-signal and arrangement for performing the method |
| 08/06/1987 | DE3600423A1 Serial electronic adding and subtracting device in decimal code |
| 08/05/1987 | EP0230668A2 Arithmetic logic circuit |
| 08/04/1987 | US4685128 Method and network for transmitting addressed signal samples from any network input to an addressed network output |
| 08/04/1987 | US4685079 Ripple-borrow binary subtraction circuit |
| 08/04/1987 | US4685078 Dual incrementor |
| 08/04/1987 | US4685077 Data processing apparatus having binary multiplication capability |
| 07/29/1987 | EP0230383A2 Sequentially performing arithmetic operations on data sets |
| 07/28/1987 | US4683548 Binary MOS ripple-carry parallel adder/subtracter and adder/subtracter stage suitable therefor |
| 07/28/1987 | US4683547 Special accumulate instruction for multiple floating point arithmetic units which use a putaway bus to enhance performance |
| 07/28/1987 | US4683546 Floating point condition code generation |
| 07/21/1987 | US4682303 Parallel binary adder |
| 07/21/1987 | US4682302 Logarithmic arithmetic logic unit |
| 07/16/1987 | DE3537285A1 Tetrad adder in 5211 code |
| 07/14/1987 | US4680727 Complex multiplier for binary two's complement numbers |
| 07/14/1987 | US4680705 Automatic data restructurer |
| 07/14/1987 | US4680539 General linear shift register |
| 07/08/1987 | EP0227788A1 Duodecimal numbering system and its applications |
| 07/07/1987 | US4679165 Multiplication unit and method for the operation thereof |
| 07/07/1987 | US4679139 Method and system for determination of data record order based on keyfield values |
| 07/07/1987 | CA1223971A1 High speed barrel shifter |
| 07/07/1987 | CA1223970A1 Dual incrementor |
| 07/02/1987 | DE3607723C1 Einrichtung und Verfahren zum Ausgeben von alphanumerischen und/oder graphischen Zeichen Apparatus and method for outputting of alphanumeric and / or graphic signs |
| 07/02/1987 | DE3542582A1 Adding circuit in decimal 1-out-of-10 code |
| 07/01/1987 | EP0227427A2 Method of and circuit for generating bit-order modified binary signals |
| 07/01/1987 | EP0227329A2 Programmable logic device |
| 07/01/1987 | EP0226991A2 Data-processing device |
| 06/30/1987 | US4677584 Data processing system with an arithmetic logic unit having improved carry look ahead |
| 06/30/1987 | US4677583 Apparatus for decimal multiplication |
| 06/30/1987 | US4677582 Operation processing apparatus |
| 06/24/1987 | EP0226261A2 Arithmetic module for a digital computer |
| 06/24/1987 | EP0226226A2 System for floating point operations |
| 06/23/1987 | US4675869 Fast decoder and encoder for Reed-Solomon codes and recording/playback apparatus having such an encoder/decoder |
| 06/23/1987 | US4675838 Conditional-carry adder for multibit digital computer |
| 06/23/1987 | US4675837 Digital arithmetic unit having shortened processing time and a simplified structure |
| 06/23/1987 | US4675809 Data processing system for floating point data having a variable length exponent part |
| 06/19/1987 | DE3536481A1 Tetrad adder in 5211 code |
| 06/16/1987 | EP0225488A2 Log encoding/decoding method |
| 06/16/1987 | CA1223065A1 Method for uniformly encoding data occurring with different word lengths |
| 06/11/1987 | DE3536725A1 Tetrad adder in 5211 code |
| 06/10/1987 | EP0224963A1 Device for square summation |
| 06/10/1987 | EP0224841A2 Logic arithmetic circuit |
| 06/10/1987 | EP0224753A2 Probability adaptation for arithmetic coders |
| 06/10/1987 | EP0224656A2 CMOS technique multistage carry ripple adder with two types of adder cells |
| 06/09/1987 | US4672568 Method for digital voltage controlled oscillator |
| 06/09/1987 | US4672537 Data error detection and device controller failure detection in an input/output system |
| 06/09/1987 | US4672535 Multiprocessor system |
| 06/03/1987 | CN86105497A Fixed-coefficient serial multiplication and digital circuits therefor |
| 06/02/1987 | US4670856 Data storage apparatus |
| 05/27/1987 | EP0223458A2 Deep trap machine |
| 05/27/1987 | EP0223308A2 Field-programmable logic device with programmable foldback to control number of logic levels |
| 05/27/1987 | CN86107497A Circuit for performing square root functions |
| 05/26/1987 | US4669099 Digital frequency multiplier |
| 05/26/1987 | US4668880 Chain logic scheme for programmed logic array |
| 05/26/1987 | CA1222323A1 Method and apparatus for signed and unsigned bounds check |
| 05/20/1987 | EP0221922A1 Cmos full adder cell e.g. for multiplier array |
| 05/19/1987 | US4667305 Circuits for accessing a variable width data bus with a variable width data field |
| 05/19/1987 | US4667301 Generator for pseudo-random numbers |
| 05/19/1987 | US4667300 Computing method and apparatus |
| 05/19/1987 | CA1222058A1 Buffer system with detection of read or write circuits failures |
| 05/13/1987 | EP0221425A2 Circuit for performing square root functions |
| 05/13/1987 | EP0221358A2 Sort string generation in a staged storage system |
| 05/12/1987 | US4665538 Bidirectional barrel shift circuit |
| 05/12/1987 | US4665523 Method and means for error detection and correction in high speed data transmission codes |
| 05/12/1987 | US4665502 Random lottery computer |
| 05/12/1987 | US4665500 Multiply and divide unit for a high speed processor |
| 05/12/1987 | US4665358 Solid state electronic pulse scaler using ratio of two integers |
| 05/07/1987 | DE3539123A1 Dual full adder |
| 05/07/1987 | DE3539122A1 Serial electronic adder-subtractor in 5211 code |
| 05/07/1987 | DE3535793A1 Tetrad adder in 5211 code |
| 05/06/1987 | EP0220684A2 Data processing system |
| 05/05/1987 | CA1221462A2 Text comparator |
| 04/28/1987 | CA1221175A1 Integrated and programmable processor for word-wise digital signal processing |
| 04/23/1987 | DE3636095A1 Digital signal processor |
| 04/22/1987 | EP0218971A2 Method for solving equations of the type z = ((x1**y1) op (x2**y2) op ... op (xn**ym))**(1/k) |
| 04/22/1987 | EP0218724A1 Fast sine and cosine generating apparatus |
| 04/21/1987 | US4660217 Shift register |
| 04/21/1987 | US4660199 Majority logic circuit for digital error correction system |
| 04/21/1987 | US4660165 Pyramid carry adder circuit |
| 04/21/1987 | US4660162 Interpolation pulse duration modulated multiplier |
| 04/15/1987 | EP0218512A1 Digital frequency divider circuit |
| 04/15/1987 | EP0218071A2 Adder cell for a carry ripple adder of the CMOS technique |
| 04/15/1987 | CN85107070A 整数映象加法器 Integer image adder |
| 04/14/1987 | US4658355 Pipeline arithmetic apparatus |
| 04/14/1987 | US4658354 Pipeline processing apparatus having a test function |
| 04/14/1987 | US4658323 RMS calculation circuit for digital circuit interrupters |
| 04/14/1987 | CA1220557A1 Modulable apparatus and methods for the classification of indexed objects |
| 04/07/1987 | US4656579 Digital data processing system having a uniquely organized memory system and means for storing and accessing information therein |
| 04/02/1987 | DE3534386A1 Method and arrangement for sorting character strings stored in memory according to a pre-defined sort criterion |
| 04/01/1987 | EP0216275A2 Method for the microprocessor-controlled supervision and for the control of a document stream in a document-processing unit |
| 03/31/1987 | US4654785 Information processing system |
| 03/31/1987 | US4653647 Sorting and stacking apparatus |
| 03/31/1987 | CA1219955A1 Digital multiplying circuit |
| 03/26/1987 | WO1987001839A1 Instruction sequencer for microprocessor with network for the determination of the phases of instruction cycles |
| 03/26/1987 | WO1987001837A1 Modular self-programmer |
| 03/26/1987 | WO1987001836A1 Random sequence generators |
| 03/24/1987 | US4653021 Data management apparatus |
| 03/24/1987 | US4653019 High speed barrel shifter |