Patents
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
11/1987
11/10/1987US4706209 Arithmetic and logic unit with overflow indicator
11/10/1987CA1229172A1 Logic adder circuit
11/10/1987CA1229169A1 Fast decoder and encoder for reed-solomon codes
11/05/1987DE3631992A1 Cryptography method and cryptography processor to carry out the method
11/05/1987DE3614842A1 Tetrad adder in 5311 code
11/05/1987DE3614792A1 Tetrad adder in 5211 code
11/04/1987EP0162076B1 A method to compensate for the truncation error in a sampled signal and a device for carrying out the method
11/03/1987US4704723 Frequency divider
11/03/1987US4704701 Conditional carry adder for a multibit digital computer
10/1987
10/28/1987EP0243212A2 Method and apparatus for processing binary-coded/packed decimal data
10/28/1987EP0242600A2 Carry look-ahead calculating method and circuits therefor
10/27/1987US4703457 Register circuit used to load, hold, and dump digital logic signals
10/27/1987US4703206 Field-programmable logic device with programmable foldback to control number of logic levels
10/27/1987US4703202 Two-stage gate circuit providing inverted and non-inverted outputs
10/22/1987DE3614058A1 Tetrad adder in 5211 code
10/22/1987DE3613314A1 Tetrad adder in 5211 code
10/21/1987EP0242003A2 Processor internal bus control
10/20/1987US4701877 Highspeed parallel adder with clocked switching circuits
10/20/1987US4701874 Digital signal processing apparatus
10/15/1987DE3611995A1 Tetrad adder in 5211 code
10/15/1987DE3611994A1 Tetrad adder in 5311 code
10/15/1987DE3608908A1 Tetrad adder in 5211 code
10/14/1987EP0241181A1 Pipeline arithmetic unit
10/14/1987EP0241001A2 Information processing apparatus having a mask function
10/14/1987EP0240546A1 Random sequence generators.
10/13/1987US4700325 Binary tree calculations on monolithic integrated circuits
10/13/1987US4700324 Digital circuit performing an arithmetic operation with an overflow
10/13/1987US4700323 Digital lattice filter with multiplexed full adder
10/13/1987US4700319 Arithmetic pipeline for image processing
10/13/1987US4700088 Dummy load controlled multilevel logic single clock logic circuit
10/13/1987CA1228156A1 Apparatus for symmetrically truncating two's complement binary signals
10/07/1987EP0240410A2 Pixel processor
10/07/1987EP0239957A2 Floating point numeric data processor
10/07/1987EP0239899A1 Multiplier array circuit
10/07/1987EP0239749A2 Cryptographic method and processor for carrying out this method
10/07/1987EP0239737A2 Systolic super summation device
10/07/1987EP0239587A1 Instruction sequencer for microprocessor with network for the determination of the phases of instruction cycles.
10/06/1987US4698831 CMOS incrementer cell suitable for high speed operations
10/06/1987US4698771 Adder circuit for encoded PCM samples
10/01/1987DE3608904A1 Tetrad adder in 5311 code
09/1987
09/30/1987EP0239276A2 Alu for a bit slice processor with multiplexed bypass path
09/30/1987EP0239267A2 Integrators
09/30/1987EP0239168A2 Arithmethic logic circuit
09/30/1987EP0239118A1 Floating-point data rounding and normalizing circuit
09/30/1987EP0238978A1 Modulo-2 adder for three input signals
09/30/1987EP0238678A1 CMOS full-adder stage
09/30/1987EP0238677A1 Device for match detection between a data word and a reference word
09/30/1987EP0238625A1 Modular self-programmer
09/29/1987US4697266 Asynchronous checkpointing system for error recovery
09/29/1987US4697248 Arithmetic circuit for obtaining the vector product of two vectors
09/29/1987US4697233 Partial duplication of pipelined stack with data integrity checking
09/24/1987DE3637828A1 Complex multiplier-accumulator
09/23/1987EP0238300A2 Serial digital signal processing circuitry
09/23/1987EP0238230A2 Programmable logic device
09/22/1987US4696020 Digital circuit for frequency or pulse rate division
09/22/1987US4695971 Circuit for rapidly determining the greatest difference among three binary numerical values
09/17/1987DE3608766A1 Electronic gear train
09/16/1987EP0237337A2 Random access memory circuits
09/16/1987EP0236781A2 Image data processing method and apparatus therefor
09/16/1987EP0236615A2 Functional units for computers
09/15/1987US4694475 Frequency divider circuit
09/15/1987US4694416 VLSI programmable digital signal processor
09/15/1987US4694412 Random number generator for use in an authenticated read-only memory
09/15/1987US4694274 Data comparison circuit constructed with smaller number of transistors
09/15/1987CA1226952A1 Apparatus for determination of the maximum difference between three numerical values
09/15/1987CA1226943A1 Method for storing digital information
09/11/1987WO1987005416A1 Process and device for selectively duplicating alphanumeric and/or graphic characters
09/10/1987DE3606884A1 Tetrad adder in 5311 code
09/09/1987EP0236177A1 Method of optimising storage of video signals in a digital image converter, and digital image converter for carrying out this method
09/09/1987EP0236108A2 Tacho signal processing
09/09/1987EP0235764A2 Computer
09/09/1987EP0235608A2 Method for constructing tree structured classifiers
09/09/1987EP0235525A2 Statistical information access system
09/09/1987CN86107928A Digital companding circuit
09/08/1987US4692933 Electro-mechanical integrator
09/08/1987US4692893 Buffer system using parity checking of address counter bit for detection of read/write failures
09/08/1987US4692891 Coded decimal non-restoring divider
09/08/1987US4692890 Method and integrator circuit for integrating signals, in particular for scintillation gamma camera
09/08/1987US4692889 Circuitry for calculating magnitude of vector sum from its orthogonal components in digital television receiver
09/08/1987US4692888 Method and apparatus for generating and summing the products of pairs of numbers
09/08/1987US4692713 Read only memory control circuit for use in a phase lock loop
09/02/1987EP0234495A2 Arithmetic circuit capable of executing floating point operations and fixed point operations
09/02/1987EP0234187A2 Programmably controlled shifting mechanism in a programmable unit having variable data path widths
09/02/1987EP0234100A2 Method and apparatus for synchronizing the generation of separate, free-running, time-dependent codes
09/01/1987US4691291 Random sequence generators
08/1987
08/26/1987EP0233635A2 Variable shift-count bidirectional shift control circuit
08/26/1987EP0233474A2 Device for determining the number of revolutions of a shaft
08/25/1987US4689763 CMOS full adder circuit
08/25/1987US4689738 Integrated and programmable processor for word-wise digital signal processing
08/20/1987DE3537286A1 Tetrad adder in 5211 code
08/19/1987EP0232789A1 Digital sine wave generator
08/19/1987EP0232376A1 Circulating context addressable memory.
08/19/1987CN87100346A Optimally partitioned regenerative carry lookahead adder
08/18/1987US4688236 Process for the use of a binary register with n bistable cells making it possible to determine the ratio of two frequencies and apparatus for performing the process
08/18/1987US4688225 Method for uniformly encoding data occurring with different word lengths
08/18/1987US4688186 Division by a constant by iterative table lookup
08/13/1987WO1987004813A1 Method and apparatus for a constant frequency clock source in phase with a variable frequency system clock
08/13/1987DE3540800A1 Binary adding cell and fast adding and multiplying unit composed of such binary adding cells
08/12/1987EP0231552A1 A method and device for sorting objects provided with a parameter, according to the value of this parameter
08/12/1987CN87100279A Method and apparatus for occuping control of series trunk wire of non-major control device