Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
01/1991
01/01/1991US4982357 Plural dummy select chain logic synthesis network
01/01/1991US4982356 Multiple-valued current mode adder implemented by transistor having negative transconductance
01/01/1991US4982355 Low-power parallel multiplier
01/01/1991US4982354 Digital finite impulse response filter and method
01/01/1991US4982353 Subsampling time-domain digital filter using sparsely clocked output latch
01/01/1991US4982352 Methods and apparatus for determining the absolute value of the difference between binary operands
12/1990
12/31/1990CA2017900A1 Sort accelerator using rebound sorter as merger
12/28/1990CA2015706A1 High speed parallel multiplier circuit
12/27/1990EP0404649A1 Device for generating a bit-masking signal during dynamic comparison of a serial data stream with a reference
12/27/1990EP0404012A2 Vector data retrieval apparatus
12/27/1990EP0403729A2 Digital-signal processing apparatus
12/27/1990EP0403625A1 Resequencing line store device.
12/26/1990CN1048111A Method for maintaining the safety of data processing system
12/26/1990CN1048110A Method for maintaining data integrity during information transmission by generating indicia representing total number of binary 1's and 0's of the data
12/25/1990US4980853 Bit blitter with narrow shift register
12/20/1990DE4019135A1 Serieller speicher auf ram-basis mit parallelem voraus-lesen Serial store on ram base with parallel read-ahead
12/19/1990EP0402533A1 Residue arithmetic apparatus
12/19/1990EP0402532A1 Residue arithmetic apparatus
12/18/1990US4979142 Two-bit floating point divide circuit with single carry-save adder
12/18/1990US4979141 Technique for providing a sign/magnitude subtraction operation in a floating point computation unit
12/18/1990US4979140 Signed digit adder circuit
12/18/1990US4979139 Arithmetic unit for exponential function
12/18/1990US4979101 Apparatus for retrieving character strings
12/18/1990US4979018 Semiconductor device with parallel multiplier using at least three wiring layers
12/13/1990DE3919171A1 Dual-8421-code change circuit - has extra branch circuit for digit 10 branching already in input region when a value 4 appears twice
12/13/1990DE3914474A1 Electronic multiplier circuit with combined circuit for main product - contg. adder circuit for valves 4 and 5 and dual full adders for 1 and 2
12/13/1990DE3913232A1 Electronic multiplier circuit - combines main and residual products in adder circuit contg. fewer than 6 adder circuits apart from full adder
12/13/1990DE3913231A1 Electronic multiplier circuit for 51111 code - has special main product combined circuit of full adder with fewer than 23 and circuits
12/13/1990DE3913230A1 Electronic multiplier circuit for 54321 code - has special main product combined circuit of full adder and fewer than 23 and circuits
12/13/1990DE3912010A1 Electronic multiplier circuit with special combined circuit - contg. full adder an fewer than 25 and circuits for forming main product
12/13/1990DE3911438A1 Multiplication circuit
12/12/1990EP0401783A2 Digital arrangement for error checking in binary adder including block carry look-ahead units
12/12/1990EP0401559A2 Digital multiplication and division circuit
12/12/1990EP0240546A4 Random sequence generators
12/11/1990US4977536 Document processor
12/11/1990US4977535 Method of computation of normalized numbers
12/11/1990US4977534 Operation circuit based on floating-point representation with selective bypass for increasing processing speed
12/11/1990CA1277772C Deep trap machine
12/06/1990DE3917539A1 Arithmetic logic unit for processor combining data words - has carry line blocking elements for varying processing width to match word lengths
12/04/1990US4975902 Circuit for putting in conference a plurality of participants in telecommunication systems
12/04/1990US4975868 Floating-point processor having pre-adjusted exponent bias for multiplication and division
12/04/1990US4975867 Apparatus for dividing elements of a Galois Field GF (2QM)
11/1990
11/29/1990WO1990014628A1 Processor suitable for recursive computations
11/29/1990DE3917313A1 Electronic multiplier circuit with only two adder circuit - makes double use of one adder using 8421 coded decimal numbers
11/29/1990DE3909044A1 Multiplication circuit
11/28/1990EP0399718A1 A recognition procedure and an apparatus for carrying out the recognition procedure
11/28/1990EP0398884A1 A relational database representation with relational database operation capability
11/27/1990US4974188 Address sequence generation by means of reverse carry addition
11/27/1990US4974186 Generalized digital multiplier and digital filter using said multiplier
11/27/1990US4974184 Maximum length pseudo-random test pattern generator via feedback network modification
11/27/1990CA1277036C Orthogonal transform processor
11/22/1990EP0398568A2 Multiplier circuit
11/21/1990CN1047152A High speed numerical processor
11/20/1990US4972362 Method and apparatus for implementing binary multiplication using booth type multiplication
11/15/1990WO1990013866A1 A programmable digital circuit for performing a matrix multiplication
11/15/1990DE3915036A1 Electronic multiplier circuit with four multiple circuits - has multiple numbers of 2, 3, 4, and 5 and uses partial product adder to produce 54321 product numbers
11/15/1990DE3910315A1 Multiplication circuit
11/14/1990EP0397632A1 Method for avoiding latent errors in a logic network for majority selection of binary signals
11/14/1990EP0397079A2 Parallel pseudo-random generator for emulating a serial pseudo-random generator and method for carrying out same
11/13/1990WO1990013869A1 A method for avoiding latent errors in a logic network for majority selection of binary signals
11/13/1990WO1990013867A1 Digital processor for two's complement computations
11/13/1990US4970688 Memory device having operating function
11/13/1990US4970679 Pulse input apparatus
11/13/1990US4970677 Full adder circuit with improved carry and sum logic gates
11/13/1990US4970676 Digital word-serial multiplier circuitry
11/13/1990US4970675 Multiplier for binary numbers comprising a very high number of bits
11/13/1990CA2051404A1 Digital processor for two's complement computations
11/12/1990CA2016635A1 Parallel pseudo-random generator for emulating a serial pseudo-random generator and method for carrying out same
11/07/1990EP0395636A1 Parallel string processor and method for a minicomputer
11/07/1990CN1046805A New algorithm of redundant code and multiplier formed thereby
11/06/1990US4969164 Programmable threshold detection logic for a digital storage buffer
11/06/1990US4969121 Programmable integrated circuit logic array device having improved microprocessor connectability
11/06/1990US4969118 Floating point unit for calculating A=XY+Z having simultaneous multiply and add
11/06/1990US4969091 Apparatus for stack control employing mixed hardware registers and memory
11/06/1990CA1276043C Galois field arithmetic logic unit
10/1990
10/31/1990EP0395348A2 Method and apparatus for multi-gauge computation
10/31/1990EP0395240A2 High speed numerical processor
10/31/1990EP0395210A2 Threshold detection circuits for digital storage buffers
10/31/1990EP0394857A2 Method and apparatus to scan convert radar video to television outputs
10/31/1990EP0394771A1 Ball-shooting game machine
10/31/1990EP0394620A2 Data processing system with queue mechanism
10/31/1990EP0394610A2 Plural dummy select chain logic synthesis network
10/31/1990EP0394499A1 Apparatus for multiplication, division and extraction of square root
10/30/1990US4967391 Data string retrieval apparatus for IC card
10/30/1990US4967388 Truncated product partial canonical signed digit multiplier
10/30/1990US4967349 Digital signal processor suitable for extacting minimum and maximum values at high speed
10/30/1990US4967339 Operation control apparatus for a processor having a plurality of arithmetic devices
10/24/1990EP0394171A2 Floating-point processor having pre-adjusted exponent bias for multiplication and division
10/24/1990EP0394170A2 Floating point normalization and rounding prediction circuit
10/24/1990EP0394169A2 Method and apparatus for processing postnormalization and rounding in parallel
10/24/1990EP0394162A2 Two-bit floating point divide circuit with single carry-save adder
10/24/1990EP0394161A2 Selection of divisor multipliers in a floating point divide circuit
10/24/1990EP0393087A1 A bit string compressor with boolean operation processing capability.
10/24/1990CA2013583A1 Method and apparatus to scan convert radar video to television outputs
10/23/1990US4965881 Linear feedback shift registers for data scrambling
10/23/1990US4965766 Digital input/out circuit capable of sending and receiving data in different modes
10/23/1990US4965762 Mixed size radix recoded multiplier
10/23/1990US4965746 Recursive-type periodic temporal signal generator
10/23/1990US4965668 Adaptive rounder for video signals
10/18/1990WO1990012456A1 Frequency multiplier circuitry and method
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