| Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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| 02/23/1988 | US4727505 Convolution arithmetic circuit for digital signal processing |
| 02/18/1988 | DE3703440A1 Floating-point scalar product formation circuit - converts variables to fixed-point representation in summation network |
| 02/18/1988 | DE3627217A1 Adder circuit using 54321 code |
| 02/18/1988 | DE3627216A1 Adder circuit using 51111 code |
| 02/16/1988 | US4725974 Electronic circuit capable of accurately carrying out a succession of divisions in a pipeline fashion |
| 02/11/1988 | WO1988001079A2 Signal processing |
| 02/11/1988 | DE3626666A1 Adder circuit using decimal 1-out-of-10 code |
| 02/11/1988 | DE3625510A1 Adder circuit in decimal 1-out-of-10 code |
| 02/11/1988 | DE3625509A1 Serial addition-subtraction unit in 1-out-of-10 code |
| 02/09/1988 | US4724529 Method and apparatus for numerical division |
| 02/04/1988 | DE3625774A1 Adder circuit in decimal 1-out-of-10 code |
| 02/03/1988 | EP0255285A2 Word-sliced signal processors |
| 02/03/1988 | EP0255118A2 Pattern generator |
| 02/03/1988 | EP0041549B1 Apparatus and method for hashing key data |
| 02/02/1988 | US4723258 Counter circuit |
| 02/02/1988 | US4723206 Vector processor |
| 01/28/1988 | WO1988000373A3 Programmably controlled partially distributed masking mechanism in a programmable unit having variable data path widths |
| 01/28/1988 | DE3624902A1 Adder circuit in decimal 1-out-of-10 code |
| 01/28/1988 | DE3624694A1 Exchange circuit in decimal 1-out-of-10 code |
| 01/28/1988 | DE3624620A1 Adder circuit in decimal 1-out-of-10 code |
| 01/28/1988 | DE3623689A1 Adder circuit in decimal 1-out-of-10 code |
| 01/27/1988 | EP0254479A2 Integrated circuit programmable sequencing element apparatus and associated method |
| 01/26/1988 | US4722094 Digital rate detection circuit |
| 01/26/1988 | US4722069 Nonrestoring divider |
| 01/26/1988 | US4722068 Double precision multiplier |
| 01/26/1988 | US4722067 Method and apparatus for implementing modulo arithmetic calculations |
| 01/26/1988 | US4722066 Digital signal overflow correction apparatus |
| 01/26/1988 | CA1232073A1 Full adder circuit |
| 01/26/1988 | CA1232072A1 Multiplication circuit using a multiplier and a carry propagating adder |
| 01/21/1988 | DE3623598A1 Adder circuit in decimal 1-out-of-10 code |
| 01/20/1988 | EP0253476A2 Multistage digital signal multiplying and adding apparatus |
| 01/20/1988 | EP0253475A2 Multistage digital signal multiplying and adding apparatus |
| 01/20/1988 | EP0253441A2 Digital circuit |
| 01/19/1988 | US4720860 Method and apparatus for positively identifying an individual |
| 01/19/1988 | US4720809 Hybrid floating point/logarithmic number system arithmetic processor |
| 01/14/1988 | WO1988000373A2 Programmably controlled partially distributed masking mechanism in a programmable unit having variable data path widths |
| 01/14/1988 | DE3622719A1 Adder circuit in 51111 code |
| 01/14/1988 | DE3621886A1 Nine's complement circuit for 54321 code |
| 01/14/1988 | DE3621865A1 Adder circuit in 54321 code |
| 01/13/1988 | EP0252511A1 Method and arrangement to combine variable-length operands in data processors |
| 01/12/1988 | US4719590 Apparatus and method for performing addition and subtraction |
| 01/12/1988 | US4719589 Arithmetic processing unit |
| 01/12/1988 | US4719571 Algorithm for constructing tree structured classifiers |
| 01/12/1988 | CA1231455A1 Nonrestoring divider |
| 01/07/1988 | EP0250976A1 Arrangement for image data processing |
| 01/07/1988 | DE3622729A1 Adder circuit in 54321 code |
| 01/07/1988 | DE3621923A1 Adder circuit in 51111 code |
| 01/05/1988 | US4718035 Logic operation circuit having an exclusive-OR circuit |
| 01/05/1988 | US4718034 Carry-save propagate adder |
| 01/05/1988 | US4718033 Intermediate decimal correction for sequential addition |
| 01/05/1988 | US4718032 Method and apparatus for effecting range transformation in a digital circuitry |
| 01/05/1988 | US4718031 Multiplying circuit |
| 01/05/1988 | US4718030 Interpolated value computing device for a waveform generated in an electronic device |
| 12/29/1987 | US4716539 Multiplier circuit for encoder PCM samples |
| 12/29/1987 | US4716538 Multiply/divide circuit for encoder PCM samples |
| 12/23/1987 | EP0250174A2 Incrementer and decrementer |
| 12/23/1987 | EP0250130A2 A method and apparatus for identifying the precision of an operand in a multiprecision floating-point processor |
| 12/17/1987 | WO1987007753A1 Programmable logic array |
| 12/17/1987 | DE3620281A1 Serial addition-subtraction unit in decimal 1-out-of-10 code |
| 12/16/1987 | EP0249279A2 Digital filter |
| 12/16/1987 | EP0249132A2 Arrangement for the bit-parallel addition of binary numbers with carry save overflow correction |
| 12/16/1987 | EP0249040A2 Booth's conversion circuit |
| 12/16/1987 | EP0248989A2 Communication bit pattern detection circuit |
| 12/15/1987 | US4713790 Exclusive OR/NOR gate having cross-coupled transistors |
| 12/15/1987 | US4713789 Processor and method of processing image data |
| 12/15/1987 | US4713786 Digital hardware selection filter |
| 12/15/1987 | US4713750 Microprocessor with compact mapped programmable logic array |
| 12/10/1987 | DE3619365A1 Serial addition-subtraction unit in decimal 1-out-of-10 code |
| 12/10/1987 | DE3618710A1 Dual full adder |
| 12/10/1987 | DE3618592A1 Partial summand conversion circuit for adder circuits in decimal 1-out-of-10 code |
| 12/10/1987 | DE3618529A1 Serial addition-subtraction unit in decimal 1-out-of-10 code |
| 12/09/1987 | EP0248166A2 Binary multibit multiplier |
| 12/08/1987 | US4712090 Data control circuits |
| 12/03/1987 | DE3618264A1 Circuit arrangement to compare two binary values |
| 12/03/1987 | DE3617650A1 Serial addition-subtraction unit in decimal 1-out-of-10 code |
| 12/03/1987 | DE3616928A1 Adder circuit in decimal 1-out-of-10 code |
| 12/03/1987 | DE3616913A1 Adder circuit in decimal 1-out-of-10 code |
| 12/03/1987 | DE3614855A1 Tetrad adder in 5211 code |
| 12/02/1987 | EP0247809A2 Programmable logic device |
| 12/02/1987 | EP0247703A1 Pseudo-random binary sequence generators |
| 12/02/1987 | EP0247502A1 Programmable logic array |
| 12/02/1987 | EP0247383A2 Apparatus for arithmetic processing |
| 11/25/1987 | EP0246714A1 Pseudo-random binary sequence generators |
| 11/24/1987 | US4709346 CMOS subtractor |
| 11/24/1987 | US4709226 Circuitry for complementing binary numbers |
| 11/19/1987 | WO1987007071A1 In-system programmable logic device |
| 11/19/1987 | WO1987007053A1 Accumulating recursive computation |
| 11/19/1987 | DE3615957A1 Adder circuit in decimal 1-out-of-10 code |
| 11/19/1987 | DE3615955A1 Adder circuit in decimal 1-out-of-10 code |
| 11/17/1987 | US4707800 Adder/substractor for variable length numbers |
| 11/17/1987 | US4707799 Bit sliced decimal adding/subtracting unit for multi-digit decimal addition and subtraction |
| 11/17/1987 | US4707798 Method and apparatus for division using interpolation approximation |
| 11/17/1987 | CA1229415A1 Floating-point addition/subtraction system |
| 11/12/1987 | DE3615709A1 Adder circuit in decimal 1-out-of-10 code |
| 11/11/1987 | EP0245029A2 High speed memory systems |
| 11/11/1987 | EP0244958A2 Sorter method and apparatus using multiple column merger |
| 11/11/1987 | EP0244925A2 Programmable logic controller |
| 11/10/1987 | US4706299 Frequency encoded logic devices |
| 11/10/1987 | US4706211 Digital multiplying circuit |
| 11/10/1987 | US4706210 Guild array multiplier for binary numbers in two's complement notation |