Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
12/1986
12/30/1986US4633039 Master-slave microprocessor control circuit
12/30/1986EP0206743A2 Zero fall-through time asynchronous FIFO buffer with nonambiguous empty/full resolution
12/30/1986EP0206657A1 Apparatus for input/output notification to a processor
12/30/1986EP0206654A1 Interrupt generation in a processor
12/30/1986EP0206580A2 Method and apparatus for interconnecting processors in a hyper-dimensional array
12/30/1986EP0206512A2 Method and apparatus for routing packets in a multinode computer interconnect network
12/30/1986EP0206345A2 I/O structure for information processing system
12/30/1986EP0206321A2 Channel number priority assignment apparatus
12/30/1986EP0206259A2 Reconfigurable input/output system
12/30/1986EP0206102A2 Programmable interface
12/30/1986EP0206083A1 Method and apparatus for interfacing buses of different sizes
12/30/1986EP0205949A2 Emulator for computer system input-output adapters
12/30/1986EP0205948A2 Distributed data management mechanism
12/30/1986EP0205946A2 Flexible data transmission for message based protocols
12/30/1986EP0205945A2 Process transparent multi storage mode data transfer and buffer control
12/30/1986EP0205943A2 Composite data-processing system using multiple standalone processing systems
12/30/1986EP0205801A1 Interrupt mechanism for multi-microprocessing system having multiple busses
12/30/1986EP0205563A1 System for selectively coupling a plurality of data stations into a single communications path.
12/30/1986EP0205467A1 Serial link communications protocol
12/30/1986EP0113352B1 Database management system for controlling concurrent access to a database
12/30/1986CA1216074A1 Database instruction find direct
12/23/1986US4631698 For interconnecting computers
12/23/1986US4631671 Data processing system capable of transferring single-byte and double-byte data under DMA control
12/23/1986US4631670 Interrupt level sharing
12/23/1986US4631669 Data processing system having no bus utilization priority control
12/23/1986US4631667 Asynchronous bus multiprocessor system
12/23/1986US4631666 Data transfer network for variable protocol management
12/23/1986US4631659 Memory interface with automatic delay state
12/23/1986US4631428 Communication interface connecting binary logic unit through a trinary logic transmission channel
12/17/1986EP0205010A2 Multiple port communications adapter apparatus
12/17/1986EP0205007A2 Multiple port service expansion adapter for a communications controller
12/17/1986EP0204960A2 Multiple port integrated DMA and interrupt controller and arbitrator
12/17/1986EP0204959A1 Automatic update of topology in a hybrid network
12/17/1986EP0204827A1 Communication controller using multiported random access memory
12/17/1986EP0201020A2 Multiprocessor system architecture
12/16/1986US4630233 I/O scanner for an industrial control
12/16/1986US4630232 Read write system for multiple line adapter organization
12/16/1986US4630199 Message transmission, reception and processing apparatus for a teleprinting station
12/16/1986US4630197 Anti-mutilation circuit for protecting dynamic memory
12/16/1986US4630195 Data processing system with CPU register to register data transfers overlapped with data transfer to and from main storage
12/16/1986US4630194 Apparatus for expediting sub-unit and memory communications in a microprocessor implemented data processing system having a multibyte system bus that utilizes a bus command byte
12/16/1986US4630193 Time multiplexed processor bus
12/16/1986US4630041 Enhanced reliability interrupt control apparatus
12/10/1986EP0077154B1 Digital data processor with high reliability and method
12/09/1986US4628504 Distributed bus control communication protocol
12/09/1986US4628503 Method and device for performing a bus request and collective acknowledgement in a process bus system
12/09/1986US4628482 Common memory control system with two bus masters
12/09/1986US4628480 Arrangement for optimized utilization of I/O pins
12/09/1986US4628478 Remote data controller for a communication system
12/09/1986US4628449 Vector interrupt system and method
12/09/1986US4628448 Operation mode setting apparatus on a single chip microprocessor
12/09/1986US4628447 Multi-level arbitration system for decentrally allocating resource priority among individual processing units
12/09/1986US4628446 Multichannel interface
12/09/1986US4628445 Apparatus and method for synchronization of peripheral devices via bus cycle alteration in a microprocessor implemented data processing system
12/09/1986CA1215159A1 Programmable cartridge telephone communication system
12/09/1986CA1215135A1 Race condition mediator circuit
12/03/1986EP0203304A1 Data processor controller
12/02/1986US4627056 Check system for a control board
12/02/1986US4627054 Multiprocessor array error detection and recovery apparatus
12/02/1986US4627052 Interconnection of communications networks
12/02/1986US4627019 Database management system for controlling concurrent access to a database
12/02/1986US4627018 Priority requestor accelerator
12/02/1986US4626987 Method of and circuit arrangement for supplying interrupt request signals
12/02/1986US4626986 Processor having plural initial loading programs for loading different operating systems
12/02/1986US4626985 Single-chip microcomputer with internal time-multiplexed address/data/interrupt bus
12/02/1986US4626846 Bus arrangement for addressing equipment units and a method therefor
12/02/1986US4626843 Multi-master communication bus system with parallel bus request arbitration
12/02/1986US4626634 Multiprocessor computing system featuring shared global control
11/1986
11/26/1986EP0202675A2 Input/output control system
11/26/1986EP0202627A2 Interface circuit for character oriented data transfer between a master station and at least one slave station
11/26/1986CN85104139A The data processing system and its method of application
11/25/1986US4625307 Apparatus for interfacing between at least one channel and at least one bus
11/25/1986CA1214567A1 Circuit for duplex synchronization of asynchronous signals
11/20/1986EP0201567A1 Flow control between a data terminal and a host computer system.
11/20/1986EP0201561A1 Variable length packet switching system
11/18/1986US4623997 Coherent interface with wraparound receive and transmit memories
11/18/1986US4623986 Memory access controller having cycle number register for storing the number of column address cycles in a multiple column address/single row address memory access cycle
11/18/1986US4623963 Device independent data transfer
11/18/1986US4623886 Prioritized data packet communication
11/18/1986US4623885 Method and arrangement for distribution of send permission to terminals in a telecommunication network
11/18/1986US4623883 Automatic communications switch
11/18/1986CA1214283A1 Symbolic language data processing system
11/12/1986EP0201356A2 High level self-checking intelligent I/O controller
11/12/1986EP0201252A2 Packet switch trunk circuit queueing arrangement
11/12/1986EP0201064A2 Computer system with data residency transparency and data access transparency
11/12/1986EP0200721A1 Arrangement for communication between equipment belonging to different network architectures.
11/12/1986CN85103308A Circuit for selecting and locking in operation function circuitry
11/11/1986US4622633 Object building method for self configuring computer network
11/11/1986US4622630 Data processing system having unique bus control protocol
11/11/1986US4622547 Memory access control apparatus
11/07/1986EP0187159A4 External interface control circuitry for microcomputer systems.
11/05/1986EP0200704A2 Bootstrap channel security arrangement for communication network
11/05/1986EP0200440A2 Electronic circuit for connecting a processor to a high-capacity memory
11/05/1986EP0200365A2 System and method for controlling network bus communications for tightly coupled information among distributed programmable controllers
11/05/1986EP0200040A1 Bus arbitrator
11/05/1986CN86102662A Input/output control system
11/05/1986CN85103803A Signals path control circuitry for a data terminal
11/04/1986US4621360 Control method of data transfer
11/04/1986US4621342 In a data-handling system
11/04/1986US4621341 Method and apparatus for transferring data in parallel from a smaller to a larger register