Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
10/1985
10/22/1985CA1195751A1 Apparatus for routing data between low order terminals and high order communications
10/17/1985EP0090016A4 Apparatus for routing data amoung low order units and a high order host computer system.
10/15/1985US4547880 Communication control apparatus for digital devices
10/15/1985US4547850 Priority control method and apparatus for common bus of data processing system
10/15/1985US4547848 Access control processing system in computer system
10/15/1985US4547845 Split-BUS multiprocessor system
10/14/1985EP0076846A4 Data processing system having error checking capability.
10/10/1985WO1985004501A1 Method of selecting address in input/output board
10/09/1985EP0157113A2 An electronic interface device between a computer and external unit
10/09/1985EP0157075A1 Modular data processing system
10/09/1985EP0156989A1 Method and arrangement providing chronologically real memory addresses for direct access to the main memory by peripheral devices in a data processing system
10/08/1985US4546450 Priority determination circuit
10/08/1985US4546430 Control unit busy queuing
10/08/1985US4546429 Interactive communication channel
10/08/1985US4546351 Data transmission system with distributed microprocessors
10/08/1985CA1194958A1 Communication system with distributed control
10/02/1985EP0156675A1 Precharge circuit for a digital data transfer bus
10/02/1985EP0156654A2 Control method for a half-duplex data transmission system
10/02/1985EP0156542A2 Interconnection of communications networks
10/02/1985EP0156477A1 A gate circuit for use in a microcomputer system
10/01/1985US4545014 Information processing apparatus
10/01/1985US4545012 Access control system for use in a digital computer system with object-based addressing and call and return operations
10/01/1985US4544850 For use in a processing system
10/01/1985CA1194608A1 Direct memory access interface arrangement
10/01/1985CA1194576A1 Deadlock detection and resolution scheme
10/01/1985CA1194575A1 Method and apparatus for establishing priority between processing units having a common communication channel
10/01/1985CA1194574A1 Two-wire bus-system comprising a clock wire and a data wire for interconnecting a number of stations
09/1985
09/25/1985EP0155741A2 Process and apparatus for the synchronisation on a foreign network clock of a digital data transmission device
09/25/1985EP0155443A1 Microocomputer data processing systems permitting bus control by peripheral processing devices
09/25/1985EP0155403A2 Control device for motor vehicles
09/25/1985EP0051655B1 Apparatus for the display and storage of television picture information by using a memory accessible from a computer
09/25/1985EP0030978B1 Data-transfer controlling system
09/24/1985US4543629 Apparatus for maximizing bus utilization
09/24/1985US4543628 Bus for data processing system with fault cycle operation
09/24/1985US4543627 Internal communication arrangement for a multiprocessor system
09/24/1985CA1194173A1 Communication system and station suitable therefor
09/18/1985EP0154774A2 Data transmission with a bidirectionel data bus
09/18/1985EP0154725A2 Method and circuit for starting a data transmission connection
09/18/1985EP0154649A1 Circuit arrangement for coupling single chip microprocessors
09/17/1985US4542517 Digital serial interface with encode logic for transmission
09/17/1985US4542501 Interface for managing information exchanges on a communications bus
09/17/1985US4542457 Burst mode data block transfer system
09/17/1985CA1193750A1 Program code fetch arrangement
09/17/1985CA1193748A1 Database management system for controlling concurrent access to database
09/17/1985CA1193746A1 Data flow control system
09/17/1985CA1193744A1 Microprocessor peripheral control circuit
09/17/1985CA1193743A1 Multiprocessor computing system featuring shared global control
09/17/1985CA1193742A1 Computer system comprising a data, address and control signal bus which comprises a left bus and a right bus
09/17/1985CA1193689A1 Circuitry for allocating access to a demand-shared bus
09/17/1985CA1193688A1 Circuitry for allocating access to a demand-shared bus
09/17/1985CA1193687A1 Circuitry for allocating access to a demand-shared bus
09/11/1985EP0154586A2 System and process for processing information
09/11/1985EP0154551A2 Apparatus for enabling a first processor to cause a second processor to effect a transfer of data between said processors
09/11/1985EP0154252A2 Programmable read only memory device and memory system employing the same
09/10/1985US4541045 Microprocessor architecture employing efficient operand and instruction addressing
09/10/1985US4541043 Resource granting process and device in a system comprising autonomous data processing units
09/10/1985CA1193368A1 Electronic document distribution network with uniform data stream
09/10/1985CA1193338A1 Circuitry for allocating access to a demand-shared bus
09/04/1985EP0153764A2 Information processor having an interruption operating function
09/03/1985US4539656 Memory access selection circuit
09/03/1985US4539636 Apparatus for inter-processor data transfer in a multi-processor system
09/03/1985US4539564 Electronically controlled interconnection system
09/03/1985CA1193028A1 Sto stack control system for multi-virtual memory in a data processing system
09/03/1985CA1193026A1 Variable cycle-time microcomputer
09/03/1985CA1193024A1 Access request control apparatus in data processing system
08/1985
08/29/1985WO1985003826A1 Multipriority communication system
08/29/1985WO1985003786A1 Method of selecting address in input/output board
08/28/1985EP0152939A2 Arithmetic operation unit and arithmetic operation circuit
08/27/1985US4538226 Buffer control system
08/27/1985US4538224 Direct memory access peripheral unit controller
08/27/1985US4538057 Cash accounting system
08/21/1985EP0151837A1 System and method for communication between nodes of a closed loop local communication path
08/20/1985US4536877 Method of communicating data
08/20/1985US4536855 Impedance restoration for fast carry propagation
08/20/1985US4536839 Memory request arbitrator
08/20/1985US4536838 Multi-processor system with communication controller using poll flags for non-contentious slot reservation
08/13/1985US4535421 Universal real time transparent asynchronous serial/echoplex converter
08/13/1985US4535404 Method and apparatus for addressing a peripheral interface by mapping into memory address space
08/13/1985US4535330 Bus arbitration logic
08/13/1985CA1191965A1 Method and apparatus for parallel processing of digital signals using multiple independent digital signal processors
08/13/1985CA1191964A1 High-speed data transfer unit for digital data processing system
08/13/1985CA1191921A1 Multi-station token pass communication system
08/13/1985CA1191920A1 Processor interconnection system
08/13/1985CA1191919A1 Communications network access rights arbitration
08/13/1985CA1191918A1 Multipoint data communication system with local arbitration
08/07/1985EP0150767A2 Program controlled bus arbitration for a distributed array processing system
08/07/1985EP0150540A2 Method for data communication as well as a station for carrying out the method
08/07/1985EP0150457A2 Circuit arrangement for connecting a subscriber to a bus
08/07/1985EP0062293B1 Multiprocessor control arrangement
08/06/1985US4534013 Binder system containing an olefin-acrylic co or terpolymers with a rosin ester
08/06/1985US4534011 Peripheral attachment interface for I/O controller having cycle steal and off-line modes
08/06/1985US4533996 Peripheral systems accommodation of guest operating systems
08/06/1985US4533994 Priority circuit for a multiplexer terminal
08/06/1985CA1191617A1 Automatic calling unit control system
08/06/1985CA1191616A1 Method and apparatus for online definition of database descriptors
08/06/1985CA1191571A1 Timer driven display updating
08/01/1985WO1985003396A1 Data transmission system
08/01/1985WO1985003372A1 Data transmitting/receiving system for transmitting data to and from auxiliary memory device
07/1985
07/31/1985EP0150084A2 Architecture for intelligent control of data communication adapters
07/31/1985EP0150039A2 I/O execution method for a virtual machine system and system therefor