Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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05/20/1992 | EP0485462A1 File alteration monitor for computer operating and file management systems |
05/20/1992 | EP0166739B1 Semiconductor memory device for serial scan applications |
05/20/1992 | CN1016743B System and method for virtual memory management |
05/19/1992 | US5115508 Password system utilizing two password types, the first being changeable after entry, the second being unchangeable until power is removed |
05/19/1992 | US5115498 Local memory fast selecting apparatus including a memory management unit (mmu) and an auxiliary memory |
05/19/1992 | US5115490 Variable length data processing apparatus with delimiter location-based address table |
05/19/1992 | US5115411 Dual port memory system |
05/19/1992 | CA1301367C Pseudo set-associative memory cacheing arrangement |
05/19/1992 | CA1301366C2 Interactive error handling means in database management |
05/19/1992 | CA1301358C Nonvolatile memory protection |
05/19/1992 | CA1301354C Alias address support |
05/14/1992 | WO1992008193A1 A fault tolerant data storage system |
05/14/1992 | WO1992008186A1 Address generator for circular buffer |
05/14/1992 | DE4034444A1 Data protected work station computer - requires special software for access and monitors system to detect unauthorised manipulation |
05/13/1992 | EP0485275A1 Security device with a memory and/or a microprocessor for data processing machines |
05/13/1992 | EP0485110A2 Logical partitioning of a redundant array storage system |
05/13/1992 | CN1016652B Information processing device and transduce switch method by way of directly mapping and way of acting of storage medium mapping |
05/12/1992 | US5113519 Maintenance of file attributes in a distributed data processing system |
05/12/1992 | US5113514 System bus for multiprocessor computer system |
05/12/1992 | US5113511 System for dynamically providing predicted high/slow speed accessing memory to a processing unit based on instructions |
05/12/1992 | US5113510 Method and apparatus for operating a cache memory in a multi-processor |
05/12/1992 | US5113509 Method of changing data on disk |
05/12/1992 | US5113508 Data cache initialization |
05/12/1992 | US5113507 Method and apparatus for a sparse distributed memory system |
05/12/1992 | US5113506 System having an address generating unit and a log comparator packaged as an integrated circuit seperate from cache log memory and cache data memory |
05/12/1992 | US5113373 Power control circuit |
05/12/1992 | US5113180 Virtual display adapter |
05/12/1992 | CA1300759C Buffer memory circuit arrangement capable of receiving a requestwithout qualification during block transfer |
05/12/1992 | CA1300758C Mechanism for lock-up free cache operation with a remote address translation unit |
05/07/1992 | WO1992008181A1 Security device having a memory and/or a microcomputer for data processing hardware |
05/06/1992 | EP0484262A2 Hypergraphics |
05/06/1992 | EP0484008A2 Information processing unit having translation buffer |
05/06/1992 | EP0483577A2 Hypermedia link marker abstract and search services |
05/06/1992 | EP0483576A2 Application independent services enabling the incorporation of hypermedia |
05/06/1992 | EP0483525A2 Workstation power management |
05/06/1992 | EP0483250A1 Non-busy-waiting resource control. |
05/06/1992 | EP0483174A1 A method of operating a data processing system. |
05/06/1992 | CN1060916A Method and apparatus for maintaining cache integrity whenever cpu. write to rom. operation is performed with rom. mapped to ram. |
05/05/1992 | US5111464 Interrupt reporting for single-bit memory errors |
05/05/1992 | US5111462 Decoders for hamming encoded data |
05/05/1992 | US5111431 Register forwarding multi-port register file |
05/05/1992 | US5111423 Programmable interface for computer system peripheral circuit card |
05/05/1992 | US5111389 Aperiodic mapping system using power-of-two stride access to interleaved devices |
05/05/1992 | US5111386 Cache contained type semiconductor memory device and operating method therefor |
05/05/1992 | CA1300280C Central processor unit for digital data processing system including write buffer management mechanism |
05/05/1992 | CA1300279C Central processor unit for digital data processing system including cache management mechanism |
05/05/1992 | CA1300275C Destination control logic for arithmetic and logic unit for digital data processor |
05/01/1992 | WO1992008199A1 Computer documents as compound documents in a notebook metaphor |
05/01/1992 | CA2093123A1 Computer documents as compound documents in a notebook metaphor |
05/01/1992 | CA2050794A1 Hypergraphics |
04/30/1992 | WO1992007323A1 Cache controller and associated method for remapping cache address bits |
04/30/1992 | DE4135031A1 Input-output device for controlling data communications with external points - has separate memory and input-output locations with common address bus |
04/29/1992 | EP0483039A2 Method and system for version control of engineering changes |
04/29/1992 | EP0483038A2 Systems and methods for providing recovery capabilities |
04/29/1992 | EP0483036A2 Data structure within object oriented computing environment |
04/29/1992 | EP0482853A2 Method and apparatus for storage device management |
04/29/1992 | EP0482851A2 A file management system for a partially rewritable storage medium |
04/29/1992 | EP0482819A2 On-line reconstruction of a failed redundant array system |
04/29/1992 | EP0482761A2 Rule driven transaction management system and method |
04/29/1992 | EP0482752A2 Methods and apparatus for maintaining cache integrity |
04/29/1992 | EP0482706A2 Method for intelligent data cache prefetching, and computer for implementing this method |
04/29/1992 | EP0482678A2 Video system controller with a row address override circuit |
04/29/1992 | EP0482582A2 Replicated data processing method in distributed processing system |
04/29/1992 | EP0482575A2 Storage system for a high-performance processor |
04/29/1992 | EP0482527A2 A normal to spare switching control system |
04/29/1992 | CN1060731A Memory controller for direct or interleave memory accessing |
04/29/1992 | CN1060730A Data processing apparatus for dynamically setting timings in dynamic memory system |
04/29/1992 | CN1060729A Computer field data guard and recovery method for breaking |
04/28/1992 | US5109521 System for relocating dynamic memory address space having received microprocessor program steps from non-volatile memory to address space of non-volatile memory |
04/28/1992 | US5109512 Process for dispatching tasks among multiple information processors |
04/28/1992 | US5109508 Data base system including memorandum information and method for managing memorandum information |
04/28/1992 | US5109505 Semiconductor memory disk apparatus with backup device capable of being accessed immediately after power source is recovered |
04/28/1992 | US5109498 Buffer memory device capable of memorizing operand and instruction data blocks at different block sizes |
04/28/1992 | US5109497 Arithmetic element controller for controlling data, control and micro store memories |
04/28/1992 | US5109496 Most recently used address translation system with least recently used (LRU) replacement |
04/28/1992 | US5109491 Memory management device |
04/28/1992 | US5109489 I/o execution method for a virtual machine system and system therefor |
04/28/1992 | US5109488 Data processing system buffering sequential data for cyclically recurrent delay times, memory address generator for use in such system |
04/28/1992 | US5109485 Method for transferring data between memories |
04/28/1992 | US5109413 Manipulating rights-to-execute in connection with a software copy protection mechanism |
04/28/1992 | US5109382 Method and apparatus for testing a memory |
04/28/1992 | US5109360 Row/column address interchange for a fault-tolerant memory system |
04/28/1992 | US5109359 Method of controlling a semiconductor integrated circuit |
04/28/1992 | US5109336 Unified working storage management |
04/28/1992 | US5109335 Buffer memory control apparatus using address translation |
04/28/1992 | US5109334 Memory management unit capable of expanding the offset part of the physical address |
04/28/1992 | US5109330 Multiprocessor system with sequential prioritized common memory access preventing memory update access by all processors except main processor |
04/28/1992 | CA1299768C Memory access control system |
04/28/1992 | CA1299767C Cache memory control system |
04/28/1992 | CA1299766C Address translator |
04/24/1992 | CA2053692A1 On-line reconstruction of a failed redundant array system |
04/24/1992 | CA2052132A1 Rule driven transaction management system and method |
04/22/1992 | EP0481907A2 Method and system for processing a multilevel bill of material |
04/22/1992 | EP0481882A1 Method to confirm memory cards secret cyphers |
04/22/1992 | EP0481881A1 Integrated circuit with improved security access |
04/22/1992 | EP0481735A2 Address protection circuit |
04/22/1992 | EP0481716A2 Control system for controlling cache storage unit |
04/22/1992 | EP0481616A2 Dynamic cache partitioning |
04/22/1992 | EP0481597A1 Memory controller for direct or interleave memory accessing |
04/22/1992 | EP0481534A2 Video system controller with a row address override circuit |