Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
05/1998
05/20/1998EP0843260A1 Automatic shelf-address assignment for shelves containing disk drives and error detection method and apparatus
05/20/1998EP0842512A1 Module security device
05/20/1998EP0842477A2 System and method for handling technical information
05/20/1998EP0842464A1 Dynamic load balancing
05/20/1998EP0777883A4 X.500 system and methods
05/20/1998EP0492808B1 On-line restoration of redundancy information in a redundant array system
05/20/1998DE19744620A1 Signal transmission system for LSI chips
05/20/1998DE19726451A1 Cash card with incorporated data protection
05/20/1998DE19711210A1 Sicherungseinrichtung für Datenspeicher Safety device for data storage
05/20/1998CN1182268A Recording medium having digital copy management data recorded therein, and recording apparatus and reproducing apparatus
05/20/1998CN1182238A Method of making axchive on removable mass storage medium and archival service device
05/20/1998CN1038460C Voltage stabilizer
05/19/1998US5754888 System for destaging data during idle time by transferring to destage buffer, marking segment blank , reodering data in buffer, and transferring to beginning of segment
05/19/1998US5754876 Data processor system for preloading/poststoring data arrays processed by plural processors in a sharing manner
05/19/1998US5754872 Character information processing system
05/19/1998US5754848 Apparatus and method for disaster recovery of an operating system utilizing long file and directory names
05/19/1998US5754834 Programmable RAS/CAS generation circuit
05/19/1998US5754825 Lower address line prediction and substitution
05/19/1998US5754821 Method and system for providing access to a protected partition of a memory device utilizing a passthru command
05/19/1998US5754820 Microprocessor system with cache memory for eliminating unnecessary invalidation of cache data
05/19/1998US5754819 Low-latency memory indexing method and structure
05/19/1998US5754818 Architecture and method for sharing TLB entries through process IDS
05/19/1998US5754817 Execution in place of a file stored non-contiguously in a non-volatile memory
05/19/1998US5754816 Data storage apparatus and method with two stage reading
05/19/1998US5754815 Method for controlling a sequence of accesses of a processor to an allocated memory
05/19/1998US5754814 Cache memory apparatus for reading data corresponding to input address information
05/19/1998US5754800 Multi processor system having dynamic priority based on row match of previously serviced address, number of times denied service and number of times serviced without interruption
05/19/1998US5754782 System and method for backing up and restoring groupware documents
05/19/1998US5754777 Apparatus and method for distributed arbitration of shared resources
05/19/1998US5754774 Client/server communication system
05/19/1998US5754769 Coupling between non-CTOS host and CTOS network
05/19/1998US5754762 Secure multiple application IC card using interrupt instruction issued by operating system or application program to control operation flag that determines the operational mode of bi-modal CPU
05/19/1998US5754758 Serial memory interface using interlaced scan
05/19/1998US5754749 Image processing device with means for processing multiple forms of image data
05/19/1998US5754730 Method for predicting what video data should be in a cache which is in a disk-based digital video recorder
05/19/1998US5754557 Method for refreshing a memory, controlled by a memory controller in a computer system, in a self-refresh mode while scanning the memory controller
05/19/1998US5754489 Serial access memory apparatus
05/19/1998US5754365 Structure and enclosure assembly for a disk drive
05/19/1998CA2055784C Hierarchical memory controller
05/14/1998WO1998020442A1 Interchangeable cartridge data storage system for devices performing diverse functions
05/14/1998WO1998020421A1 A way prediction structure
05/14/1998WO1998020420A1 A data cache capable of performing store accesses in a single clock cycle
05/14/1998WO1998020419A1 System and method for maintaining a logically consistent backup using minimal data transfer
05/14/1998WO1998020417A1 Information appliance architecture
05/14/1998WO1998020415A1 Processing device, reads instructions in memory
05/14/1998WO1998020411A1 Automatic access of electronic information through machine-readable codes on printed documents
05/14/1998WO1997047143A3 Web browser allowing navigation between hypertext objects using remote control
05/14/1998DE19748675A1 Pre-read-out for memory component selecting lower memory field
05/14/1998CA2268929A1 System and method for maintaining a logically consistent backup using minimal data transfer
05/13/1998EP0841622A2 A system for managing co-presence within communities
05/13/1998EP0841619A2 Method and apparatus for detecting thrashing in a cache memory
05/13/1998EP0840986A1 Distributing network services and resources in a mobile communications network
05/13/1998CN1181829A Address generator, image display, address generation method and image display method
05/13/1998CN1181828A Image forming appts.
05/13/1998CN1181823A Improved integrated circuit and method for using same
05/13/1998CN1181579A Information recording method and its device
05/13/1998CN1181557A Information searching device
05/13/1998CN1181545A Information acquisition proxy system and information transfer managing system
05/13/1998CN1181544A Enhanced memory performace of processor by elimination of outdated lines in second-level cathe
05/13/1998CN1181543A Safety tech. for computer
05/13/1998CN1038367C 数据存储装置 Data storage means
05/12/1998US5752275 Translation look-aside buffer including a single page size translation unit
05/12/1998US5752274 Address translation unit employing a victim TLB
05/12/1998US5752272 Memory access control device with prefetch and read out block length control functions
05/12/1998US5752267 Data processing system for accessing an external device during a burst mode of operation and method therefor
05/12/1998US5752265 Memory accessing in a multi-processor system using snooping
05/12/1998US5752264 Computer architecture incorporating processor clusters and hierarchical cache memories
05/12/1998US5752263 Apparatus and method for reducing read miss latency by predicting sequential instruction read-aheads
05/12/1998US5752262 System and method for enabling and disabling writeback cache
05/12/1998US5752261 Method and apparatus for detecting thrashing in a cache memory
05/12/1998US5752260 High-speed, multiple-port, interleaved cache with arbitration of multiple access addresses
05/12/1998US5752259 Instruction cache configured to provide instructions to a microprocessor having a clock cycle time less than a cache access time of said instruction cache
05/12/1998US5752258 Encoding method for directory state in cache coherent distributed shared memory system
05/12/1998US5752255 Dynamic non-coherent cache memory resizing mechanism
05/12/1998US5752252 Storage of file data on disk in multiple representations
05/12/1998US5752246 Service agent for fulfilling requests of a web browser
05/12/1998US5752243 Computer method and storage structure for storing and accessing multidimensional data
05/12/1998US5752069 Superscalar microprocessor employing away prediction structure
05/12/1998US5752060 File access scheme in distributed data processing system
05/12/1998US5752054 System and method for developing and/or maintaining multiple workplace protection programs
05/12/1998US5752045 Power conservation in synchronous SRAM cache memory blocks of a computer system
05/12/1998US5752039 Executable file difference extraction/update system and executable file difference extraction method
05/12/1998US5752038 Method and system for determining an optimal placement order for code portions within a module
05/12/1998US5751998 Memory accessing system with portions of memory being selectively write protectable and relocatable based on predefined register bits and memory selection RAM outputs
05/12/1998US5751997 Method and apparatus for transferring archival data among an arbitrarily large number of computer devices in a networked computer environment
05/12/1998US5751996 Method and apparatus for processing memory-type information within a microprocessor
05/12/1998US5751995 Apparatus and method of maintaining processor ordering in a multiprocessor system which includes one or more processors that execute instructions speculatively
05/12/1998US5751994 System and method for enhancing computer operation by prefetching data elements on a common bus without delaying bus access by multiple bus masters
05/12/1998US5751993 Cache management system
05/12/1998US5751992 Computer program product for continuous destaging of changed data from a shared cache in a multisystem shared disk environment wherein castout interest is established in a hierarchical fashion
05/12/1998US5751990 Abridged virtual address cache directory
05/12/1998US5751989 System for decentralizing backing store control of virtual memory in a computer
05/12/1998US5751988 Microcomputer with memory bank configuration and register bank configuration
05/12/1998US5751987 Distributed processing memory chip with embedded logic having both data memory and broadcast memory
05/12/1998US5751976 Bus system for use with information processing apparatus
05/12/1998US5751963 Hierarchical network management system operating as a proxy agent for enhancing processing efficiency
05/12/1998US5751957 Communication service system employing translation rules for communicating data in different languages along a network
05/12/1998US5751955 Method of synchronizing a pair of central processor units for duplex, lock-step operation by copying data into a corresponding locations of another memory
05/12/1998US5751936 Checking for proper locations of storage devices in a storage device array
05/12/1998US5751932 Fail-fast, fail-functional, fault-tolerant multiprocessor system
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