Patents
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
09/1998
09/15/1998US5809551 Pending page release
09/15/1998US5809550 Method and apparatus for pushing a cacheable memory access operation onto a bus controller queue while determining if the cacheable memory access operation hits a cache
09/15/1998US5809548 System and method for zeroing pages with cache line invalidate instructions in an LRU system having data cache with time tags
09/15/1998US5809546 Method for managing I/O buffers in shared storage by structuring buffer table having entries including storage keys for controlling accesses to the buffers
09/15/1998US5809545 Optical disc for a master key, and a method and apparatus for optical-disc information management which inhibit and permit reproduction of main information from an illegal copy disc by using physical and logical security information
09/15/1998US5809544 Microcontroller which limits access to internal memory
09/15/1998US5809543 Fault tolerant extended processing complex for redundant nonvolatile file caching
09/15/1998US5809542 Dumping method for dumping data to a dump data storage device that manages the the dumping of data updated since a previous dump request
09/15/1998US5809539 Processor system having address allocation and address lock capability adapted for a memory comprised of synchronous DRAMs
09/15/1998US5809537 Method and system for simultaneous processing of snoop and cache operations
09/15/1998US5809536 Method for reducing the number of coherency cycles within a directory-based cache coherency memory system uitilizing a memory state cache
09/15/1998US5809535 Cache memory control apparatus utilizing a bit as a second valid bit in a tag in a first mode and as an additional address bit in a second mode
09/15/1998US5809534 Performing a write cycle to memory in a multi-processor system
09/15/1998US5809532 Data processor with cache and method of operation
09/15/1998US5809531 Computer system for executing programs using an internal cache without accessing external RAM
09/15/1998US5809530 Method and apparatus for processing multiple cache misses using reload folding and store merging
09/15/1998US5809529 Data processing system
09/15/1998US5809528 Method and circuit for a least recently used replacement mechanism and invalidated address handling in a fully associative many-way cache memory
09/15/1998US5809527 Data processing system
09/15/1998US5809526 Data processing system and method for selective invalidation of outdated lines in a second level memory in response to a memory request initiated by a store operation
09/15/1998US5809525 Multi-level computer cache system providing plural cache controllers associated with memory address ranges and having cache directories
09/15/1998US5809524 Method and apparatus for cache memory replacement line identification
09/15/1998US5809523 System and method for determining relative cache performance in a computer system
09/15/1998US5809522 Microprocessor system with process identification tag entries to reduce cache flushing after a context switch
09/15/1998US5809520 Interchangeable cartridge data storage system for devices performing diverse functions
09/15/1998US5809517 In an information processing apparatus
09/15/1998US5809515 Semiconductor storage device in which instructions are sequentially fed to a plurality of flash memories to continuously write and erase data
09/15/1998US5809514 Microprocessor burst mode data transfer ordering circuitry and method
09/15/1998US5809512 Information provider apparatus enabling selective playing of multimedia information by interactive input based on displayed hypertext information
09/15/1998US5809507 Method and apparatus for storing persistent objects on a distributed object network using a marshaling framework
09/15/1998US5809506 Method for creating an object base of persisent application objects in an object oriented programming environment and apparatus related thereto
09/15/1998US5809503 Locking mechanism for check in/check out model which maintains data consistency amongst transactions
09/15/1998US5809498 Method of locating a penstroke sequence in a computer
09/15/1998US5809440 Agricultural implement having multiple agents for mapping fields
09/15/1998US5809340 Adaptively generating timing signals for access to various memory devices based on stored profiles
09/15/1998US5809336 High performance microprocessor having variable speed system clock
09/15/1998US5809322 Apparatus and method for signal processing
09/15/1998US5809321 General purpose, multiple precision parallel operation, programmable media processor
09/15/1998US5809320 High-performance multi-processor having floating point unit
09/15/1998US5809318 Method and apparatus for synchronizing, displaying and manipulating text and image documents
09/15/1998US5809314 In a multiprocessor computer system
09/15/1998US5809298 File server
09/15/1998US5809297 Programmed computer system
09/15/1998US5809287 Automatic computer upgrading
09/15/1998US5809280 Adaptive ahead FIFO with LRU replacement
09/15/1998US5809278 Circuit for controlling access to a common memory based on priority
09/15/1998US5809274 Purge control for ON-chip cache memory
09/15/1998US5809270 In a pipeline system
09/15/1998US5809264 Interface with device having unusual access time and method thereof
09/15/1998US5809263 Integrated circuit I/O using a high performance bus interface
09/15/1998US5809248 Method and apparatus for front end navigator and network architecture for performing functions on distributed files in a computer network
09/15/1998US5809244 Multi-media title playing apparatus
09/15/1998US5809239 Load balancing in servers by allocating buffer to streams with successively larger buffer requirements until the buffer requirements of a stream can not be satisfied
09/15/1998US5809228 Method and apparatus for combining multiple writes to a memory resource utilizing a write buffer
09/15/1998US5808958 Random access memory with latency arranged for operating synchronously with a micro processor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock
09/15/1998US5808911 Computer system
09/15/1998US5808886 Reconfiguring control system in a parallel processing system by replacing an error-detected processing unit
09/15/1998US5808612 Virtual office with connections between source data machine, and a viewer objects
09/15/1998CA2123822C Federated information management architecture and system
09/15/1998CA2119401C Computer system which overrides write protection status during execution in system management mode
09/11/1998WO1998039867A2 Replicating forms from html templates
09/11/1998WO1998039769A2 Freeing disk space in a file system
09/11/1998WO1998039708A1 Memory with redundancy circuit
09/11/1998WO1998039707A1 Process and apparatus for downloading data from a server computer to a client computer
09/11/1998WO1998039705A1 A method and system for in a multimedia environment managing global information entities across a plurality of html containers
09/11/1998WO1998039701A1 Electronic data processing device and system
09/11/1998WO1998039700A2 Scope testing of documents in a search engine
09/11/1998WO1998033325A3 Method and system for transferring content information and supplemental information relating thereto
09/11/1998CA2281672A1 Process and apparatus for downloading data from a server computer to a client computer
09/09/1998EP0863513A2 Method of writing data into memory with finite guaranteed write number of times and device for writing data into such memory
09/09/1998EP0863464A1 A cache coherency mechanism
09/09/1998EP0863453A1 Shared-data environment in which each file has independent security properties
09/09/1998EP0862765A1 A method and apparatus for making a hypermedium interactive
09/09/1998EP0862762A1 Semiconductor memory device having error detection and correction
09/09/1998EP0862761A2 Data error detection and correction for a shared sram
09/09/1998EP0485462B1 File alteration monitor for computer operating and file management systems
09/09/1998CN1192814A Protection of softward against use without permit
09/08/1998US5806086 Multiprocessor memory controlling system associating a write history bit (WHB) with one or more memory locations in controlling and reducing invalidation cycles over the system bus
09/08/1998US5806085 Method for non-volatile caching of network and CD-ROM file accesses using a cache directory, pointers, file name conversion, a local hard disk, and separate small database
09/08/1998US5806082 Wrap-around mechanism for memory split-wordline read
09/08/1998US5806070 Device and method for controlling solid-state memory system
09/08/1998US5806060 Interactive data analysis employing a knowledge base
09/08/1998US5806059 Database management system and method for query process for the same
09/08/1998US5805912 Microprocessor arranged to synchronously access an external memory operating at a slower rate than the microproccessor
09/08/1998US5805907 System and method for reducing power consumption in an electronic circuit
09/08/1998US5805889 System and method for integrating editing and versioning in data repositories
09/08/1998US5805885 In a computer system
09/08/1998US5805873 Phase linking of output clock with master clock in memory architecture
09/08/1998US5805872 Apparatus for generation of control signals from the read cycle rate and read speed of a memory
09/08/1998US5805855 Data cache array having multiple content addressable fields per cache line
09/08/1998US5805854 System and process for memory column address organization in a computer system
09/08/1998US5805838 Fast arbiter with decision storage
09/08/1998US5805821 Video optimized media streamer user interface employing non-blocking switching to achieve isochronous data transfers
09/08/1998US5805809 Installable performance accelerator for maintaining a local cache storing data residing on a server computer
09/08/1998US5805787 Disk based disk cache interfacing system and method
09/08/1998US5805606 Cache module fault isolation techniques
09/08/1998US5805544 Recorded data processing method and apparatus providing for fine detail management and editing of reproduced data irrespective of the data structure
09/08/1998US5805490 Associative memory circuit and TLB circuit
09/08/1998US5805219 Apparatus capable of safely recording an information when removing a recording medium
09/08/1998US5805133 Method and apparatus for increasing the rate of scrolling in a frame buffer system designed for windowing operations