Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
08/1998
08/11/1998US5793945 Method and device for initial-diagnosing processors
08/11/1998US5793941 On-chip primary cache testing circuit and test method
08/11/1998US5793776 Circuit test method
08/11/1998US5793774 Flash memory controlling system
08/11/1998US5793693 For use in a computer
08/11/1998US5793685 Semiconductor memory device capable of simultaneously designating multibit test mode and special test mode
08/11/1998US5793665 High-speed synchronous mask ROM with pipeline structure
08/11/1998US5793663 Multiple page memory
08/11/1998US5793385 Address translator for a shared memory computing system
08/11/1998US5793317 Low power approach to state sequencing and sequential memory addressing in electronic systems
08/11/1998CA2110243C Apparatus and methods for making a portion of a first name space available as a portion of a second name space
08/11/1998CA2044207C Memory access control having commonly shared pipeline structure
08/11/1998CA2042684C Information processing apparatus
08/06/1998WO1998034386A1 Web request broker controlling multiple processes
08/06/1998WO1998034193A1 Ic card and method of using ic card
08/06/1998WO1998034172A1 A cache system
08/05/1998EP0856818A2 Apparatus and method for accessing secured data stored in a portable data carrier
08/05/1998EP0856803A2 File system interface to a database
08/05/1998EP0856802A2 Method and apparatus for performing an aggregate query in a database system
08/05/1998EP0856798A1 A cache system
08/05/1998EP0856797A1 A cache system for concurrent processes
08/05/1998EP0856796A2 Variable-grained memory sharing for clusters of symmetric multi-processors
08/05/1998EP0856177A1 Accessing databases
08/05/1998EP0856176A1 Database management system and data transmission process
08/05/1998CN1189907A Transaction recovery in a value transfer system
08/05/1998CN1189902A Semiconductor memory having arithmetic function, and processor using the same
08/04/1998US5790979 Translation method in which page-table progression is dynamically determined by guard-bit sequences
08/04/1998US5790892 Information handling system for modifying coherency response set to allow intervention of a read command so that the intervention is not allowed by the system memory
08/04/1998US5790890 Computer system
08/04/1998US5790886 Method in a data processing system
08/04/1998US5790883 Multiple ports storage device with programmable overlapped data bits access
08/04/1998US5790873 Method and apparatus for power supply switching with logic integrity protection
08/04/1998US5790868 Customer information control system and method with transaction serialization control functions in a loosely coupled parallel processing environment
08/04/1998US5790852 Computer with extended virtual storage concept
08/04/1998US5790849 Method and apparatus to permit the boot of a shared memory buffer architecture employing an arbitrary operating system
08/04/1998US5790828 Disk meshing and flexible storage mapping with enhanced flexible caching
08/04/1998US5790823 Operand prefetch table
08/04/1998US5790801 Data management system
08/04/1998US5790782 Automatic disk drive shelf address assignment and error detection method and apparatus
08/04/1998US5790776 Apparatus for detecting divergence between a pair of duplexed, synchronized processor elements
08/04/1998US5790773 Method and apparatus for generating snapshot copies for data backup in a raid subsystem
08/04/1998US5790770 Method and apparatus for reducing information loss in a communications network
08/04/1998US5790670 Apparatus and method for securing electronic circuitry
08/04/1998US5790663 Method and apparatus for software access to a microprocessor serial number
08/04/1998US5790499 Method for protecting data recorded on a partial read-only memory (ROM) medium from unauthorized copying
08/04/1998US5790443 Mixed-modulo address generation using shadow segment registers
08/04/1998US5790137 In a graphic display system
08/04/1998US5790136 Graphics subsystem
08/04/1998US5790130 Texel cache interrupt daemon for virtual memory management of texture maps
08/04/1998US5789805 Semiconductor multi-chip module
08/04/1998CA2128595C Shared memory with benign failure modes
08/03/1998CA2228483A1 Variable-grained memory sharing for clusters of symmetric multi-processors
07/1998
07/31/1998CA2228186A1 Method and apparatus for performing an aggregate query in a database system
07/30/1998WO1998033325A2 Method and system for transferring content information and supplemental information relating thereto
07/30/1998WO1998033320A1 Method of transferring media files over a communications network
07/30/1998WO1998033297A2 Computer system with distributed data storing
07/30/1998WO1998033181A1 System and method for memory reset of a vehicle controller
07/30/1998WO1998033124A1 Multiple format addressing in a microcontroller
07/30/1998WO1998033112A1 Semiconductor disk device
07/30/1998WO1998033106A1 Method and system for injecting new code into existing application code
07/30/1998CA2279631A1 Method of transferring media files over a communications network
07/29/1998EP0855656A2 Method and system for query processing in a relational database
07/29/1998EP0855653A1 Memory controller with a programmable strobe delay
07/29/1998EP0855645A2 System and method for speculative execution of instructions with data prefetch
07/29/1998EP0855071A1 Enhanced security semiconductor device, semiconductor circuit arrangement, and method of production thereof
07/29/1998EP0855057A1 Address transformation in a cluster computer system
07/29/1998EP0855052A1 Protection of software against use without permit
07/29/1998CN1189235A Video camera system and semiconductor image memory circuit applied to it
07/29/1998CN1188965A Multi-entry fully associative transition cathe
07/29/1998CN1188935A Common disk unit multi-computer system
07/28/1998US5787496 Digital signal processor having a partitioned memory with first and second address areas for receiving and storing data in sychronism with first and second sampling clocks
07/28/1998US5787495 Method and apparatus for selector storing and restoration
07/28/1998US5787494 Computer-based system
07/28/1998US5787493 Method for use with a computer system
07/28/1998US5787490 Multiprocess execution system that designates cache use priority based on process priority
07/28/1998US5787487 Information storage system for converting data at transfer
07/28/1998US5787486 Bus protocol for locked cycle cache hit
07/28/1998US5787485 Producing a mirrored copy using reference labels
07/28/1998US5787481 System for managing write and/or read access priorities between central processor and memory operationally connected
07/28/1998US5787479 Method and system for preventing information corruption in a cache memory caused by an occurrence of a bus error during a linefill operation
07/28/1998US5787478 Method and system for implementing a cache coherency mechanism for utilization within a non-inclusive cache memory hierarchy
07/28/1998US5787477 Multi-processor cache coherency protocol allowing asynchronous modification of cache data
07/28/1998US5787476 System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer
07/28/1998US5787475 Controlled prefetching of data requested by a peripheral
07/28/1998US5787474 Dependency checking structure for a pair of caches which are accessed from different pipeline stages of an instruction processing pipeline
07/28/1998US5787473 Cache management system using time stamping for replacement queue
07/28/1998US5787471 Cache memory management apparatus having a replacement method based on the total data retrieval time and the data size
07/28/1998US5787470 Inter-cache protocol for improved WEB performance
07/28/1998US5787469 Computer system
07/28/1998US5787468 Computer system with a cache coherent non-uniform memory access architecture using a fast tag cache to accelerate memory references
07/28/1998US5787467 Cache control apparatus
07/28/1998US5787466 Multi-tier cache and method for implementing such a system
07/28/1998US5787465 Destination indexed miss status holding registers
07/28/1998US5787464 Computer system including a dual memory configuration which supports on-line memory extraction and insertion
07/28/1998US5787461 High speed optical disk drive caching executable and non-executable data
07/28/1998US5787460 Disk array apparatus that only calculates new parity after a predetermined number of write requests
07/28/1998US5787457 Cached synchronous DRAM architecture allowing concurrent DRAM operations
07/28/1998US5787447 Memory allocation maintaining ordering across multiple heaps
07/28/1998US5787445 Operating system including improved file management for use in devices utilizing flash memory as main memory
07/28/1998US5787441 Method of replicating data at a field level
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