| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
|---|
| 12/30/1997 | US5703793 Video decompression |
| 12/30/1997 | US5703628 Image data store device |
| 12/30/1997 | CA2001390C View composition in a data-base management system |
| 12/29/1997 | EP0814590A2 Preventing conflicts in distributed systems |
| 12/29/1997 | EP0814478A2 Multibank-multiport memories and systems and methods using the same |
| 12/29/1997 | EP0814474A1 Method and apparatus for dubbing control |
| 12/29/1997 | EP0814428A2 A method and apparatus for transferring pixel data stored in a memory circuit |
| 12/29/1997 | EP0814415A2 Information providing system |
| 12/29/1997 | EP0814414A2 Embedding sound in web pages |
| 12/29/1997 | EP0814407A1 Method and control circuit for protecting an input of an electronic circuit |
| 12/29/1997 | EP0814406A1 Method and apparatus for transforming a virtual address |
| 12/29/1997 | EP0814405A2 Method and apparatur for information processing and memory allocation system |
| 12/29/1997 | EP0814398A1 Method and system for detecting fraudulent data update |
| 12/29/1997 | EP0813717A1 Method and device for searching and finding data from a file |
| 12/29/1997 | EP0813714A1 Multi-user data processing system with storage protection |
| 12/29/1997 | EP0813713A1 Lookaside buffer for address translation in a computer system |
| 12/29/1997 | EP0813709A1 Parallel access micro-tlb to speed up address translation |
| 12/29/1997 | EP0793824A4 User definable pictorial interface for accessing information in an electronic file system |
| 12/29/1997 | EP0651897B1 Method for the dynamic management of a free store in a computer, the free store being designed for subdivision into at least two logic zones with different access characteristics |
| 12/29/1997 | EP0284037B1 Modular data storage directories for large-capacity data storage units |
| 12/24/1997 | WO1997049211A1 Method and apparatus for data processing |
| 12/24/1997 | WO1997049056A2 Apparatus and method for remote data recovery |
| 12/24/1997 | WO1997049044A1 Network based access system |
| 12/24/1997 | WO1997049037A1 Novel cache memory structure and method |
| 12/24/1997 | WO1997049031A1 Error detection device and method |
| 12/24/1997 | WO1997041515A3 An advanced data server with an i/o ring coupled to a disc array ring |
| 12/24/1997 | WO1997036236A3 Operating system for use with protection domains in a single address space |
| 12/24/1997 | CN1168729A System and method for processing of memory data and communication system comprising such system |
| 12/24/1997 | CN1168506A Method and apparatus for controlling peripheral equipment |
| 12/24/1997 | CN1168502A Method for accessing register in data processing system |
| 12/23/1997 | US5701516 High-performance non-volatile RAM protected write cache accelerator system employing DMA and data transferring scheme |
| 12/23/1997 | US5701510 Method and system for efficient designation and retrieval of particular segments within a multimedia presentation utilizing a data processing system |
| 12/23/1997 | US5701503 Method and apparatus for transferring information between a processor and a memory system |
| 12/23/1997 | US5701502 Isolating a central processing unit from the operating system controlling said unit and its associated hardware for interaction of the unit with data handling apparatus alien to the operating system |
| 12/23/1997 | US5701492 Fail-safe flashing of EPROM |
| 12/23/1997 | US5701474 Converting handle-based find first/find next/find closed to non-handle based find first/find next |
| 12/23/1997 | US5701467 Computer data storage management system and methods of indexing a dataspace and searching a computer memory |
| 12/23/1997 | US5701465 Method and apparatus for reserving system resources to assure quality of service |
| 12/23/1997 | US5701463 Method of replacing the identity of a file with another as part of a file open request in a computer system |
| 12/23/1997 | US5701462 Distributed file system providing a unified name space with efficient name resolution |
| 12/23/1997 | US5701458 For use in a data processing system |
| 12/23/1997 | US5701456 System and method for interactively formulating database queries using graphical representations |
| 12/23/1997 | US5701452 Computer generated structure |
| 12/23/1997 | US5701451 Method for fulfilling requests of a web browser |
| 12/23/1997 | US5701438 Logical relocation of memory based on memory device type |
| 12/23/1997 | US5701437 Dual-memory managing apparatus and method including prioritization of backup and update operations |
| 12/23/1997 | US5701436 Information processing apparatus including synchronous storage having backup registers for storing the latest sets of information to enable state restoration after interruption |
| 12/23/1997 | US5701435 In a processing system |
| 12/23/1997 | US5701433 Computer system having a memory controller which performs readahead operations which can be aborted prior to completion |
| 12/23/1997 | US5701432 Multi-threaded processing system having a cache that is commonly accessible to each thread |
| 12/23/1997 | US5701431 Method and system for randomly selecting a cache set for cache fill operations |
| 12/23/1997 | US5701426 Data processing system and method using cache miss address prediction and forced LRU status in a cache memory to improve cache hit ratio |
| 12/23/1997 | US5701422 In a processing system |
| 12/23/1997 | US5701413 Multi-processor system with shared memory |
| 12/23/1997 | US5701315 Method and device for protecting the execution of linear sequences of commands performed by a processor |
| 12/18/1997 | WO1997048055A1 Bus coupler between a system bus and a local bus in a multiple processor data processing system |
| 12/18/1997 | WO1997048048A1 Word width selection for sram cache |
| 12/18/1997 | WO1997048047A1 Improved non-volatile and volatile cache providing data integrity |
| 12/18/1997 | WO1997048034A1 Apparatus and method for the protected transmission and representation of electronically published documents |
| 12/18/1997 | WO1997048032A2 Programmable metallization cell and method of making |
| 12/18/1997 | DE19720168A1 Cache memory access controller for processor system |
| 12/17/1997 | EP0813327A2 Access control system and method |
| 12/17/1997 | EP0813326A2 Apparatus and method for predicted response generation |
| 12/17/1997 | EP0813205A2 Single in-line memory module |
| 12/17/1997 | EP0813204A2 Single in-line memory module |
| 12/17/1997 | EP0813194A2 Recording medium having digital copy management data recorded thereon, and recording and/or reproducing apparatus in which reproduction or recording operation is controlled on the basis of the digital copy management data |
| 12/17/1997 | EP0813159A2 Method and system for prioritised downloading of embedded web objects |
| 12/17/1997 | EP0813154A1 Circuit for data transfer between distant memories and computer comprising such a circuit |
| 12/17/1997 | EP0813152A2 Memory protection mechanism |
| 12/17/1997 | EP0813150A2 Method and system for escrowed backup of hotelled world wide web sites |
| 12/17/1997 | EP0813133A2 A uniform mechanism for using signed content |
| 12/17/1997 | EP0813132A2 Support for trusted software distribution |
| 12/17/1997 | EP0812440A1 Method for processing and accessing data objects, particularly documents, and system therefor |
| 12/17/1997 | EP0812438A1 A method and apparatus for controlling linear and toggle mode burst access sequences using toggle mode increment logic |
| 12/17/1997 | EP0812437A1 Performing speculative system memory reads |
| 12/17/1997 | EP0812428A1 Method and apparatus for combining writes to memory |
| 12/17/1997 | EP0739515B1 Data memory and processor bus |
| 12/17/1997 | CN1167947A Microcomputer |
| 12/17/1997 | CN1167946A Device for distributing data in response to plurality of requests for same file |
| 12/17/1997 | CN1036737C Method for relations recovery of data base in case of errors |
| 12/16/1997 | US5699552 System for improved processor throughput with enhanced cache utilization using specialized interleaving operations |
| 12/16/1997 | US5699551 Software invalidation in a multiple level, multiple cache system |
| 12/16/1997 | US5699550 Computer system cache performance on write allocation cycles by immediately setting the modified bit true |
| 12/16/1997 | US5699548 Method and apparatus for selecting a mode for updating external memory |
| 12/16/1997 | US5699546 Memory management control device and method for performing rewrite on internal non-volatile memory according to an operation state determination |
| 12/16/1997 | US5699544 Method and apparatus for using a fixed width word for addressing variable width data |
| 12/16/1997 | US5699543 Profile guided TLB and cache optimization |
| 12/16/1997 | US5699542 Address space manipulation in a processor |
| 12/16/1997 | US5699540 Pseudo-concurrent access to a cached shared resource |
| 12/16/1997 | US5699539 Virtual memory management system and method using data compression |
| 12/16/1997 | US5699538 Efficient firm consistency support mechanisms in an out-of-order execution superscaler multiprocessor |
| 12/16/1997 | US5699526 Ordering and downloading resources from computerized repositories |
| 12/16/1997 | US5699511 System and method for dynamically varying low level file system operation timeout parameters in network systems of variable bandwidth |
| 12/16/1997 | US5699510 Failure detection system for a mirrored memory dual controller disk storage system |
| 12/16/1997 | US5699509 Method and system for using inverted data to detect corrupt data |
| 12/16/1997 | US5699486 System for speaking hypertext documents such as computerized help files |
| 12/16/1997 | US5699428 System for automatic decryption of file data on a per-use basis and automatic re-encryption within context of multi-threaded operating system under which applications run in real-time |
| 12/16/1997 | US5699426 Video data bus communication system and method |
| 12/16/1997 | US5699336 Reproducing apparatus having buffer memory and capable of rapidly restarting reproduction and method of controlling the apparatus |
| 12/16/1997 | US5699317 Enhanced DRAM with all reads from on-chip cache and all writers to memory array |