Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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09/03/1998 | WO1998038586A1 Method of determining the visibility to a remote databaseclient of a plurality of database transactions using simplified visibility rules |
09/03/1998 | WO1998038579A1 Method for reducing the frequency of cache misses in a computer |
09/03/1998 | WO1998038572A1 Method and device for executing by a single processor several functions of different criticality levels, operating with high security |
09/03/1998 | WO1998038564A2 Partially replicated distributed database with multiple levels of remote clients |
09/03/1998 | WO1998037977A1 An agricultural implement having multiple agents for mapping fields |
09/03/1998 | DE19723332A1 Microprocessor program manipulation protection method |
09/02/1998 | EP0862316A2 Electronic image recording apparatus and data memorizing method therefor |
09/02/1998 | EP0862304A2 Method for file transfer |
09/02/1998 | EP0862129A2 Apparatus and method for data processing |
09/02/1998 | EP0862120A1 Original text generating apparatus and its program storage medium |
09/02/1998 | EP0862119A2 A method and apparatus for generating and distributing clock signals with minimal skew |
09/02/1998 | EP0861479A1 Method for determining an encryption key associated with an integrated circuit |
09/02/1998 | EP0861472A2 Service order system having staged databases |
09/02/1998 | EP0861464A1 A digital storage jukebox with cache memory |
09/02/1998 | EP0861461A2 Systems and methods for secure transaction management and electronic rights protection |
09/02/1998 | CN1192286A Module security device |
09/02/1998 | CN1192009A Method and apparatus for preloading different default address translation attributes |
09/01/1998 | US5802605 Physical address size selection and page size selection in an address translator |
09/01/1998 | US5802604 Method for addressing page tables in virtual memory |
09/01/1998 | US5802603 Method and apparatus for asymmetric/symmetric DRAM detection |
09/01/1998 | US5802602 Method and apparatus for performing reads of related data from a set-associative cache memory |
09/01/1998 | US5802601 Interface between a memory having a given number of address inputs and a processor having fewer address outputs, and processor and memory equipped accordingly |
09/01/1998 | US5802600 Method and apparatus for determining a desirable directory/data block ratio in a cache memory |
09/01/1998 | US5802598 Apparatus for processing data |
09/01/1998 | US5802594 Single phase pseudo-static instruction translation look-aside buffer |
09/01/1998 | US5802591 Method and system for preventing unauthorized access to information stored in a computer |
09/01/1998 | US5802588 Load/store unit implementing non-blocking loads for a superscalar microprocessor and method of selecting loads in a non-blocking fashion from a load/store buffer |
09/01/1998 | US5802586 Cache memory having a read-modify-write operation and simultaneous burst read and write operations and a method therefor |
09/01/1998 | US5802585 Batched checking of shared memory accesses |
09/01/1998 | US5802583 Sysyem and method providing selective write protection for individual blocks of memory in a non-volatile memory device |
09/01/1998 | US5802582 Explicit coherence using split-phase controls |
09/01/1998 | US5802578 Multinode computer system with cache for combined tags |
09/01/1998 | US5802577 Multi-processing cache coherency protocol on a local bus |
09/01/1998 | US5802576 Speculative cache snoop during DMA line update |
09/01/1998 | US5802575 Hit bit for indicating whether load buffer entries will hit a cache when they reach buffer head |
09/01/1998 | US5802574 Method and apparatus for quickly modifying cache state |
09/01/1998 | US5802572 Write-back cache having sub-line size coherency granularity and method for maintaining coherency within a write-back cache |
09/01/1998 | US5802571 Apparatus and method for enforcing data coherency in an information handling system having multiple hierarchical levels of cache memory |
09/01/1998 | US5802570 Multiprocessor system with parallel execution of data |
09/01/1998 | US5802569 Computer system having cache prefetching amount based on CPU request types |
09/01/1998 | US5802568 Simplified least-recently-used entry replacement in associative cache memories and translation lookaside buffers |
09/01/1998 | US5802567 Data processing system |
09/01/1998 | US5802566 Method and system for predicting addresses and prefetching data into a cache memory |
09/01/1998 | US5802565 Speed optimal bit ordering in a cache memory |
09/01/1998 | US5802564 Method and apparatus for increasing processor performance |
09/01/1998 | US5802563 Efficient storage of data in computer system with multiple cache levels |
09/01/1998 | US5802562 Information processing system and including a supplemental memory and method of operation |
09/01/1998 | US5802561 Simultaneous, mirror write cache |
09/01/1998 | US5802560 In a computer system |
09/01/1998 | US5802559 Mechanism for writing back selected doublewords of cached dirty data in an integrated processor |
09/01/1998 | US5802557 System and method for caching information in a digital data storage subsystem |
09/01/1998 | US5802556 In a microprocessor |
09/01/1998 | US5802555 Computer system including a refresh controller circuit having a row address strobe multiplexer and associated method |
09/01/1998 | US5802554 Method and system for reducing memory access latency by providing fine grain direct access to flash memory concurrent with a block transfer therefrom |
09/01/1998 | US5802552 System and method for allocating and sharingpage buffers for a flash memory device |
09/01/1998 | US5802551 Method and apparatus for controlling the writing and erasing of information in a memory device |
09/01/1998 | US5802549 Method and apparatus for patching pages of ROM |
09/01/1998 | US5802548 Software programmable edge delay for SRAM write enable signals on dual purpose cache controllers |
09/01/1998 | US5802547 Data storage system with streamlined data exchange path to cached data |
09/01/1998 | US5802544 Addressing multiple removable memory modules by remapping slot addresses |
09/01/1998 | US5802541 Method and apparatus in a data processing system for using chip selects to perform a memory management function |
09/01/1998 | US5802522 Method and system of storing data blocks that have common data elements |
09/01/1998 | US5802519 Coherent data structure with multiple interaction contexts for a smart card |
09/01/1998 | US5802399 Data transfer control unit for reducing memory requirements in an information processor by converting bit width of data being transferred between memory and processing parts |
09/01/1998 | US5802397 System for storage protection from unintended I/O access using I/O protection key by providing no control by I/O key entries over access by CP entity |
09/01/1998 | US5802387 Efficient data transfer in a digital signal processor |
09/01/1998 | US5802342 Image creating device loadable with external memory medium capable of storing an image creating program and created image data |
09/01/1998 | US5802341 Method for the dynamic allocation of page sizes in virtual memory |
09/01/1998 | US5802332 Single-chip microcomputer and electronic device using the same |
09/01/1998 | US5802331 Data processing system comprising an asynchronously controlled pipeline |
09/01/1998 | US5802323 In a computer system |
09/01/1998 | US5802297 Client-server computer system and method utilizing a local client disk drive as a data cache |
09/01/1998 | US5802275 Program-execution apparatus |
09/01/1998 | US5802245 Recording medium having video data and corresponding audio data aligned with physical segments |
09/01/1998 | US5802062 Preventing conflicts in distributed systems |
09/01/1998 | US5802010 Burst EDO memory device |
09/01/1998 | US5802002 Cache memory device of DRAM configuration without refresh function |
09/01/1998 | US5801973 Method for operating a state machine |
09/01/1998 | US5801775 Moving picture compression using cache memory for storing coding instructions |
09/01/1998 | US5801753 Method and apparatus for providing an interactive guide to events available on an information network |
09/01/1998 | US5801708 MIP map texture storage by dividing and allocating among multiple blocks |
09/01/1998 | CA2088779C Computer performance by simulated cache associativity |
08/27/1998 | WO1998037667A2 Data caching on the internet |
08/27/1998 | WO1998037497A1 Virtual space information processor |
08/27/1998 | WO1998037491A1 Validation system for maintaining parity integrity in a disk array |
08/27/1998 | WO1998037481A1 Techniques for defining, using and manipulating rights management data structures |
08/27/1998 | DE19738542A1 High power data processing device |
08/27/1998 | DE19723676A1 Chip-card program reloading e.g. for customer use under field conditions |
08/27/1998 | CA2643148A1 Technique for defining, using and manipulating rights management data structures |
08/27/1998 | CA2275877A1 Validation system for maintaining parity integrity in a disk array |
08/26/1998 | EP0860882A2 Anti-tamper bond wire shield for an integrated circuit |
08/26/1998 | EP0860881A2 Anti-tamper integrated circuit |
08/26/1998 | EP0860828A2 Recording and reproducing information |
08/26/1998 | EP0860779A1 Information processing unit, information processing structure unit, information processing structure, memory structure unit and semiconductor memory device |
08/26/1998 | EP0860763A1 Information registration method and document information processing apparatus |
08/26/1998 | EP0860017A1 Loosely coupled mass storage computer cluster |
08/26/1998 | EP0859986A1 Method and apparatus for server-independent caching of dynamically-generated customized pages |
08/26/1998 | EP0661635B1 A system for controlling command queuing on parity drives in an array of disk drives |
08/26/1998 | CN1191643A System and method for access control for data storage media |
08/26/1998 | CN1191356A Data hiding method and data extracting method |