| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 01/07/1998 | EP0817091A2 System and method for parallelizing execution of memory transactions using multiple memory models |
| 01/07/1998 | EP0817088A2 Flushing data buffers in a bridge between two PCI buses |
| 01/07/1998 | EP0817084A2 A circuit and method for replacement of address translations |
| 01/07/1998 | EP0817083A1 Virtual address translation unit for asynchronous transfer mode (ATM) segmentation and reassembly unit |
| 01/07/1998 | EP0817082A2 A circuit and method for flush checking memory of an address translation unit |
| 01/07/1998 | EP0817081A2 Flushing of cache memory in a computer system |
| 01/07/1998 | EP0817080A2 Multi-level cache memory |
| 01/07/1998 | EP0817079A2 Skip-level write-through in a multi-level memory of a computer system |
| 01/07/1998 | EP0817078A2 Allocation of cache memory space in a computer system |
| 01/07/1998 | EP0817077A2 A multiprocessing system configured to perform prefetching operations |
| 01/07/1998 | EP0817076A1 A multiprocessing computer system employing local and global address spaces and multiple access modes |
| 01/07/1998 | EP0817075A1 A multiprocessing system configured to perform synchronization operations |
| 01/07/1998 | EP0817074A1 Multiprocessing system employing a three-hop communication protocol |
| 01/07/1998 | EP0817073A2 A multiprocessing system configured to perform efficient write operations |
| 01/07/1998 | EP0817072A2 A multiprocessing system configured to store coherency state within multiple subnodes of a processing node |
| 01/07/1998 | EP0817071A2 A multiprocessing system configured to detect and efficiently provide for migratory data access patterns |
| 01/07/1998 | EP0817070A1 Multiprocessing system employing a coherency protocol including a reply count |
| 01/07/1998 | EP0817069A1 Methods and apparatus for a coherence transformer with limited memory for connecting computer system coherence domains |
| 01/07/1998 | EP0817068A1 Methods and apparatus for substantially memory-less coherence transformer for connecting computer node coherence domains |
| 01/07/1998 | EP0817067A2 Integrated processor/memory device with victim data cache |
| 01/07/1998 | EP0817066A2 Integrated processor/memory device with full width cache |
| 01/07/1998 | EP0817065A1 Methods and apparatus for a coherence transformer for connecting computer system coherence domains |
| 01/07/1998 | EP0817064A2 Methods and apparatus for a directory less memory access protocol in a distributed shared memory computer system |
| 01/07/1998 | EP0817063A2 Encoding method for directory state in cache coherent distributed shared memory system |
| 01/07/1998 | EP0817062A2 Multi-processor computing system and method of controlling traffic flow |
| 01/07/1998 | EP0817061A2 Method for increasing the data storage rate of a computer system |
| 01/07/1998 | EP0817060A2 A hierarchical SMP computer system |
| 01/07/1998 | EP0817059A1 Auxiliary translation lookaside buffer for assisting in accessing data in remote address spaces |
| 01/07/1998 | EP0817054A2 Simultaneous, mirror write cache |
| 01/07/1998 | EP0817051A2 A multiprocessing system having coherency related error logging capabilities |
| 01/07/1998 | EP0817044A2 Memory allocation in a multithreaded environment |
| 01/07/1998 | EP0817042A2 A multiprocessing system including an apparatus for optimizing spin-lock operations |
| 01/07/1998 | EP0817040A2 Methods and apparatus for sharing stored data objects in a computer system |
| 01/07/1998 | EP0817036A2 Information processing apparatus and method |
| 01/07/1998 | EP0817026A2 Method and apparatus for storing persistent objects on a distributed object network |
| 01/07/1998 | EP0817025A2 Data structures and method for implementing subcontracts in a distributed object oriented system |
| 01/07/1998 | EP0817013A2 Data processing method and apparatus |
| 01/07/1998 | EP0816977A2 Dual voltage module interconnect |
| 01/07/1998 | EP0816970A2 Method and apparatus for firmware authentication |
| 01/07/1998 | EP0816969A2 Capability security for distributed object systems |
| 01/07/1998 | EP0816967A2 Secure file system |
| 01/07/1998 | EP0815561A2 Optimization circuitry and control for a synchronous memory device with programmable latency period |
| 01/07/1998 | EP0815519A1 Computer system and computer-implemented process for remote editing of computer files |
| 01/07/1998 | EP0815518A1 Computer system and computer-implemented process for creation and maintenance of on-line services |
| 01/07/1998 | EP0815513A1 Multi-processing cache coherency protocol on a local bus |
| 01/07/1998 | EP0815512A1 Computer backup system operable with open files |
| 01/07/1998 | EP0815508A1 A multi-sequential computer for real-time applications |
| 01/07/1998 | EP0815505A1 Arrangement and method relating to handling of digital signals and a processing arrangement comprising such |
| 01/07/1998 | EP0725951B1 Validity checking |
| 01/07/1998 | EP0665968B1 A system for operating application software in a safety critical environment |
| 01/07/1998 | CN1169785A Method and apparatus for correcting errors of disk-drive cmulator |
| 01/07/1998 | CN1169784A Secret data storage device, secret data reading method, and control program storing medium |
| 01/07/1998 | CN1169628A Data management system and method for replicated data |
| 01/06/1998 | US5706513 System and method for queuing an retrieving data objects to and from a shared storage medium |
| 01/06/1998 | US5706511 Data base system and load distribution control method |
| 01/06/1998 | US5706504 Method and system for storing data objects using a small object data stream |
| 01/06/1998 | US5706494 In a relational database management system |
| 01/06/1998 | US5706491 Branch processing unit with a return stack including repair using pointers from different pipe stages |
| 01/06/1998 | US5706490 Method of processing conditional branch instructions in scalar/vector processor |
| 01/06/1998 | US5706482 Memory access controller |
| 01/06/1998 | US5706481 Apparatus and method for integrating texture memory and interpolation logic in a computer system |
| 01/06/1998 | US5706480 Memory device and method for processing digital video signal |
| 01/06/1998 | US5706474 Synchronous memory system with asynchronous internal memory operation |
| 01/06/1998 | US5706472 Computer-implemented method |
| 01/06/1998 | US5706469 Data processing system controlling bus access to an arbitrary sized memory area |
| 01/06/1998 | US5706467 Sequential cache management system utilizing the establishment of a microcache and managing the contents of such according to a threshold comparison |
| 01/06/1998 | US5706466 Data processing system |
| 01/06/1998 | US5706465 Computers having cache memory |
| 01/06/1998 | US5706464 Method and system for achieving atomic memory references in a multilevel cache data processing system |
| 01/06/1998 | US5706463 Cache coherent computer system that minimizes invalidation and copyback operations |
| 01/06/1998 | US5706462 Self optimizing font width cache |
| 01/06/1998 | US5706461 Method and apparatus for implementing virtual memory having multiple selected page sizes |
| 01/06/1998 | US5706435 System for maintaining data coherency in cache memory by periodically broadcasting a single invalidation report from server to clients |
| 01/06/1998 | US5706407 System for reallocation of memory banks in memory sized order |
| 01/06/1998 | US5706292 Layout for a semiconductor memory device having redundant elements |
| 01/06/1998 | US5706247 Integrated memory device |
| 01/06/1998 | US5706244 Semiconductor memory device having shared sense amplifier arrays individually controlled for cache storage |
| 01/06/1998 | US5706225 Memory apparatus with dynamic memory cells having different capacitor values |
| 01/06/1998 | US5706033 Display data readout circuit |
| 01/03/1998 | CA2209157A1 Signaling protocol conversion between a processor and a high-performance system bus |
| 01/02/1998 | DE19727243A1 Hard disc drive with conversion of logical addresses into physical addresses |
| 01/02/1998 | DE19625839A1 Medical system architecture |
| 01/02/1998 | DE19625837A1 Medical system architecture |
| 01/02/1998 | DE19625196A1 Datenarchivierungssystem Data archiving system |
| 12/31/1997 | WO1997050088A1 Semiconductor memory device |
| 12/31/1997 | WO1997050048A1 Data filing system |
| 12/31/1997 | WO1997050042A1 A method and apparatus for providing concurrent access by a plur ality of agents to a shared memory |
| 12/31/1997 | WO1997050035A1 Memory device |
| 12/31/1997 | CN2271731Y Writing protector of computer soft disk driver |
| 12/31/1997 | CN1168999A Method and apparatus for detecting and concealing data errors in stored digital data |
| 12/31/1997 | CN1168998A Programme conversion device and method therefor |
| 12/30/1997 | US5704058 Cache bus snoop protocol for optimized multiprocessor computer system |
| 12/30/1997 | US5704056 Cache-data transfer system |
| 12/30/1997 | US5704055 Dynamic Reconfiguration of main storage and expanded storage by means of a service call logical processor |
| 12/30/1997 | US5704040 Data processing system |
| 12/30/1997 | US5704039 Mask programmable security system for a data processor and method therefor |
| 12/30/1997 | US5704031 Method of performing self-diagnosing hardware, software and firmware at a client node in a client/server system |
| 12/30/1997 | US5703951 System and method for access data control |
| 12/30/1997 | US5703888 Method for checking a reloadable memory, memory checking device, and automatic data restoring device |
| 12/30/1997 | US5703806 Graphics controller integrated circuit without memory interface |