Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
10/1998
10/28/1998CN1197245A Apparatus and method for querying replicated databases
10/28/1998CN1197243A Data hiding method and system using statistical properties
10/28/1998CN1197235A Method of layering cathe and architectural specific functions for operation splitting
10/28/1998CN1197234A Programable controller
10/27/1998US5829052 Method and apparatus for managing memory accesses in a multiple multiprocessor cluster system
10/27/1998US5829051 Apparatus and method for intelligent multiple-probe cache allocation
10/27/1998US5829046 On-line tape backup using an integrated cached disk array
10/27/1998US5829045 Apparatus for restoring/copying the contents recorded in a storage medium to an auxiliary storage including partitions having independent file structures
10/27/1998US5829044 Filing apparatus filing system file processing method and program containing file processing method
10/27/1998US5829043 Coupler circuit and its use in a card and process
10/27/1998US5829041 Method and apparatus for managing single virtual space suitable for distributed processing
10/27/1998US5829040 Snooper circuit of a multi-processor system
10/27/1998US5829039 Memory control method/device for maintaining cache consistency with status bit indicating that a command is being processed with respect to a memory area
10/27/1998US5829038 Backward inquiry to lower level caches prior to the eviction of a modified line from a higher level cache in a microprocessor hierarchical cache structure
10/27/1998US5829037 Multiprocessor system having a large number of processor system components connected to a plurality of serial high-speed-buses
10/27/1998US5829036 Method for providing and operating upgradeable cache circuitry
10/27/1998US5829035 System and method for preventing stale data in multiple processor computer systems
10/27/1998US5829034 Method and apparatus for a coherence transformer with limited memory for connecting computer system coherence domains
10/27/1998US5829033 Optimizing responses in a coherent distributed electronic system including a computer system
10/27/1998US5829032 Multiprocessor system
10/27/1998US5829030 System for performing cache flush transactions from interconnected processor modules to paired memory modules
10/27/1998US5829029 Private cache miss and access management in a multiprocessor system with shared memory
10/27/1998US5829028 Data cache configured to store data in a use-once manner
10/27/1998US5829027 Removable processor board having first, second and third level cache system for use in a multiprocessor computer system
10/27/1998US5829026 Computer system
10/27/1998US5829025 Computer system and method of allocating cache memories in a multilevel cache hierarchy utilizing a locality hint within an instruction
10/27/1998US5829024 Hierarchical cache memory system and method for controlling data coherency between a primary and a secondary cache
10/27/1998US5829023 Method and apparatus for encoding history of file access to support automatic file caching on portable and desktop computers
10/27/1998US5829022 Method and apparatus for managing coherency in object and page caches
10/27/1998US5829019 Computer network server backup with posted write cache disk controllers
10/27/1998US5829018 Apparatus and method for writing data from a cache to a storage device
10/27/1998US5829017 Removable medium data storage with pre-reading before issuance of a first read command
10/27/1998US5829015 Semiconductor integrated circuit device having multi-port RAM memory with random logic portion which can be tested without additional test circuitry
10/27/1998US5829014 Method of supervising storage of data in a memory card having EEPROM and a memory card system using the same
10/27/1998US5829013 Memory manager to allow non-volatile memory to be used to supplement main memory
10/27/1998US5829010 Apparatus and method to efficiently abort and restart a primary memory access
10/27/1998US5829009 Method and device for storing and recalling information implementing a kanerva memory system
10/27/1998US5829008 Real-time clock with extendable memory
10/27/1998US5829007 Technique for implementing a swing buffer in a memory array
10/27/1998US5829005 Circular size-bounded file technique for a computer operating system
10/27/1998US5828907 Token-based adaptive video processing arrangement
10/27/1998US5828899 System for peripheral devices recursively generating unique addresses based on the number of devices connected dependent upon the relative position to the port
10/27/1998US5828877 In a computer system
10/27/1998US5828871 Information processing apparatus with connection between memory and memory control unit
10/27/1998US5828869 Microprocessor arranged for synchronously accessing an external memory with a scalable clocking mechanism
10/27/1998US5828861 System and method for reducing the critical path in memory control unit and input/output control unit operations
10/27/1998US5828860 Data processing device equipped with cache memory and a storage unit for storing data between a main storage or CPU cache memory
10/27/1998US5828853 Method and apparatus for interfacing two systems operating in potentially differing Endian modes
10/27/1998US5828821 For use in a fault tolerant multiprocessor system
10/27/1998US5828753 Circuit and method for ensuring interconnect security within a multi-chip integrated circuit package
10/27/1998US5828423 Motion vector detection circuit provided with the picture data memory
10/27/1998US5828375 Information processing unit for automatically building work environment for holding information necessary to reflect activities carried out in work environment
10/27/1998CA2158810C Control method and system for resetting backup data
10/22/1998WO1998047072A1 System and method for multi-level memory domain protection
10/22/1998WO1998047071A1 Read operations in multiprocessor computer system
10/22/1998WO1998047060A2 Systems and methods for protecting access to encrypted information
10/22/1998WO1998040850A3 A system for, and method of, off-loading network transactions from a mainframe to an intelligent input/output device, including off-loading message queuing facilities
10/22/1998WO1998039769A3 Freeing disk space in a file system
10/22/1998DE19816895A1 Memory use allocation method for visual output apparatus
10/22/1998CA2286364A1 Read operations in multiprocessor computer system
10/21/1998EP0872804A2 Processing records from a database
10/21/1998EP0872798A1 Computer memory organization
10/21/1998EP0872796A1 Method for managing a shared memory
10/21/1998EP0872086A1 Method and apparatus for discarding frames in a communications device
10/21/1998EP0871939A1 Flexible hyperlink association system and method
10/21/1998EP0797807B1 Method and apparatus for moving subtrees in a network directory
10/21/1998EP0643853B1 System for accessing distributed data cache channel at each network node to pass requests and data
10/21/1998CN1196530A Cache-coherency protocol with upstream undefined state
10/21/1998CN1196525A Method for bursting transmission processor data to I/O device or backward transmission
10/21/1998CN1196524A Memory access control circuit
10/21/1998CN1196523A Method of layering cache and architectural specific functions
10/21/1998CA2233412A1 System of data receiving stations connected in a network
10/20/1998US5826266 Cyberspace system for accessing virtual reality objects
10/20/1998US5826253 Database system with methodology for notifying clients of any additions, deletions, or modifications occurring at the database server which affect validity of a range of data records cached in local memory buffers of clients
10/20/1998US5826109 Method and apparatus for performing multiple load operations to the same memory location in a computer system
10/20/1998US5826108 Data processing system having microprocessor-based burst mode control
10/20/1998US5826077 Apparatus and method for adding an associative query capability to a programming language
10/20/1998US5826076 Computer-based information access method and apparatus to permit SQL-based manipulation of programming language-specific data files
10/20/1998US5826059 Microcomputer for emulation
10/20/1998US5826057 Method for managing virtual address space at improved space utilization efficiency
10/20/1998US5826052 Computer system
10/20/1998US5826031 Method and system for prioritized downloading of embedded web objects
10/20/1998US5826025 In a computer network
10/20/1998US5826021 Disconnected write authorization in a client/server computing system
10/20/1998US5826007 Memory data protection circuit
10/20/1998US5826002 Parity storage unit, in a disk array system for generating updated parity data from received data records
10/20/1998US5825882 Encryption and authentication method and circuit for synchronous smart card
10/20/1998US5825877 Support for portable trusted software
10/20/1998US5825788 Data ordering for cache data transfer
10/20/1998US5825783 Semiconductor integrated circuit device with large-scale memory and controller embedded on one semiconductor chip and method of testing the device
10/20/1998US5825759 Distributing network services and resources in a mobile communications network
10/20/1998US5825706 Circuit and method for retaining data in DRAM in a portable electronic device
10/20/1998US5825697 Circuit and method for enabling a function in a multiple memory device module
10/20/1998US5825682 Cache memory capable of using faulty tag memory
10/20/1998US5825372 Image processing system including a variable size memory bus
10/20/1998US5825204 For use with a sequence of signal groups transmitted on a data bus
10/20/1998CA2119174C Fully pipelined and highly concurrent memory controller
10/18/1998CA2235060A1 Processing records from a database
10/17/1998CA2233407A1 Shared memory management process
10/15/1998WO1998046036A1 Arrangement for improving availability of services in a communication system
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