G06F 12 - Accessing, addressing or allocating within memory systems or architectures

Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
11/1998
11/24/1998	US5841715 Integrated circuit I/O using high performance bus interface
11/24/1998	US5841712 Dual comparator circuit and method for selecting between normal and redundant decode logic in a semiconductor memory device
11/24/1998	US5841711 Semiconductor memory device with redundancy switching method
11/24/1998	US5841598 Information recording/reproducing apparatus and data processing method
11/24/1998	US5841580 Memory device
11/24/1998	CA2137506C Memory access protection circuit with encryption key
11/24/1998	CA2047696C Method of reading and writing files on non-erasable storage media
11/24/1998	CA2046723C Distributed computing system
11/22/1998	CA2237975A1 Information adding/extracting method, information adding/extracting system, information signal processor and information signal recording medium
11/19/1998	WO1998036416A3 Method of managing a symmetrically blocked nonvolatile memory having a bifurcated storage architecture
11/19/1998	WO1998030969A3 Dma device with local page table
11/19/1998	WO1998025210A3 Computer interface for direct mapping of application data
11/19/1998	DE19742179C1 Module coupling unit for bus system
11/19/1998	CA2237671A1 Electronic self-locating system and method
11/18/1998	EP0878765A2 Microcontroller utilizing internal and external memory
11/18/1998	EP0878759A1 Remote controlling method and apparatus
11/18/1998	EP0878756A2 Magnetic disk and magnetic disk control apparatus
11/18/1998	EP0878755A1 Nonvolatile semiconductor disk device
11/18/1998	EP0878104A1 Automatic data service selection
11/18/1998	EP0877986A2 Computer-assisted method of segmenting an electronic document for a network data system
11/18/1998	EP0877981A1 Processing device, reads instructions in memory
11/18/1998	EP0466550B1 Conversion of internal processor register commands to I/O space address
11/18/1998	CN1199481A Method and device for processing information
11/18/1998	CN1199283A Motion image decoding method and apparatus
11/18/1998	CN1199204A File management system of image data
11/18/1998	CN1199203A Coprocessor-integrated packet-type memory LSI, packet-type memory/coprocessor bus, and control method thereof
11/17/1998	US5839108 Flash memory file system in a handheld record and playback device
11/17/1998	US5838984 Single-instruction-multiple-data processing using multiple banks of vector registers
11/17/1998	US5838946 Computer system
11/17/1998	US5838945 Tunable software control of harvard architecture cache memories using prefetch instructions
11/17/1998	US5838922 Access control system for a data system
11/17/1998	US5838903 Configurable password integrity servers for use in a shared resource environment
11/17/1998	US5838902 Copy protection circuit for a data in a memory
11/17/1998	US5838901 Overridable data protection mechanism for PLDs
11/17/1998	US5838894 Logical, fail-functional, dual central processor units formed from three processor units
11/17/1998	US5838893 Method and system for remapping physical memory
11/17/1998	US5838614 Identification and verification of a sector within a block of mass storage flash memory
11/17/1998	US5838613 Semiconductor memory device having security function
11/17/1998	US5838334 Computer system
11/17/1998	US5838313 Multimedia-based reporting system with recording and playback of dynamic annotation
11/17/1998	US5838307 Reconfigurable video game/simulator system
11/17/1998	US5836785 Apparatus and method to uniquely identify similarly connected electrical devices
11/17/1998	CA2045948C Data file directories and methods
11/12/1998	WO1998050860A1 Multiported bypass cache
11/12/1998	WO1998050850A2 Device provided with a recording unit and a memory
11/12/1998	WO1998050846A1 Method and apparatus for maintaining cache coherency in an integrated circuit operating in a low power state
11/12/1998	WO1998050845A1 Source synchronous interface between master and slave using a deskew latch
11/12/1998	WO1998050838A2 A method and system for providing on-line interactivity over a server-client network
11/12/1998	WO1998037667A3 Data caching on the internet
11/12/1998	WO1998030948A3 Apparatus and method for operably connecting a processor cache to a digital signal processor
11/12/1998	DE19719691A1 Data transferral method for optical disk mass storage system
11/11/1998	EP0877384A2 Semiconductor memory device
11/11/1998	EP0877383A2 Semiconductor memory device
11/11/1998	EP0877382A2 Semiconductor memory device
11/11/1998	EP0877381A2 Semiconductor memory device
11/11/1998	EP0877327A2 Method and apparatus for performing a join query in a database system
11/11/1998	EP0877324A2 Association rule generation and group-by processing system
11/11/1998	EP0877323A2 Apparatus and method for maintaining integrated data consistency across multiple databases
11/11/1998	EP0813714B1 Multi-user data processing system with storage protection
11/11/1998	EP0789877A4 System and method for on-line, real-time, data migration
11/11/1998	EP0688450B1 Flash file system
11/11/1998	CN1198574A Microcomputer capable of suppresing energy comsumption in capacity increasing of program memory
11/11/1998	CN1198553A High speed cache for pomoting multiple-design and system architecture special function layering method
11/11/1998	CN1040703C 数据总线 Data Bus
11/10/1998	US5835973 Instruction processing unit capable of efficiently accessing the entire address space of an external memory
11/10/1998	US5835972 Method and apparatus for optimization of data writes
11/10/1998	US5835971 Method and apparatus for generating addresses in parallel processing systems
11/10/1998	US5835969 Address test pattern generator for burst transfer operation of a SDRAM
11/10/1998	US5835968 Apparatus for providing memory and register operands concurrently to functional units
11/10/1998	US5835966 Semiconductor memory device and memory access system using a four-state address signal
11/10/1998	US5835965 Memory system with multiplexed input-output port and memory mapping capability
11/10/1998	US5835964 Virtual memory system with hardware TLB and unmapped software TLB updated from mapped task address maps using unmapped kernel address map
11/10/1998	US5835963 Processor with an addressable address translation buffer operative in associative and non-associative modes
11/10/1998	US5835962 Parallel access micro-TLB to speed up address translation
11/10/1998	US5835961 System for non-current page table structure access
11/10/1998	US5835959 Memory management system and method using dual indexing structures
11/10/1998	US5835957 System and method for a fast data write from a computer system to a storage system by overlapping transfer operations
11/10/1998	US5835955 Disk array controller with enhanced synchronous write
11/10/1998	US5835954 Target DASD controlled data migration move
11/10/1998	US5835953 Backup system that takes a snapshot of the locations in a mass storage device that has been identified for updating prior to updating
11/10/1998	US5835952 Monolithic image data memory system and access method that utilizes multiple banks to hide precharge time
11/10/1998	US5835951 Branch processing unit with target cache read prioritization protocol for handling multiple hits
11/10/1998	US5835950 Self-invalidation method for reducing coherence overheads in a bus-based shared-memory multiprocessor apparatus
11/10/1998	US5835948 Single bank, multiple way cache memory
11/10/1998	US5835947 Central processing unit and method for improving instruction cache miss latencies using an instruction buffer which conditionally stores additional addresses
11/10/1998	US5835946 High performance implementation of the load reserve instruction in a superscalar microprocessor that supports multi-level cache organizations
11/10/1998	US5835945 In a computer
11/10/1998	US5835944 Method for storing, transferring decompressing and reconstructing wave table audio sample
11/10/1998	US5835942 Distributed data cache for cached multiprocessor system with cache control for file-by-file cache states
11/10/1998	US5835941 Internally cached static random access memory architecture
11/10/1998	US5835940 disk apparatus with multiple raid operating modes
11/10/1998	US5835939 Data transfer control method and apparatus for external storage subsystem adapted to perform erasing after writing
11/10/1998	US5835938 Read/write control for grouped disk storage including parallel access
11/10/1998	US5835937 Microcomputer with an improved DRAM-controller responsible for a CBR self-refresh operation
11/10/1998	US5835936 Single-chip flash-memory device using serial command, address, and data communcations
11/10/1998	US5835935 Method of and architecture for controlling system data with automatic wear leveling in a semiconductor non-volatile mass storage memory
11/10/1998	US5835934 Method and apparatus of low power cache operation with a tag hit enablement
11/10/1998	US5835932 Methods and systems for maintaining data locality in a multiple memory bank system having DRAM with integral SRAM
11/10/1998	US5835931 Arrangement for determining the configuration of a memory utilizing dedicated control devices and dedicated control lines
11/10/1998	US5835929 Method and apparatus for sub cache line access and storage allowing access to sub cache lines before completion of a line fill

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