Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
06/2003
06/04/2003EP1317073A1 Tuner arrangement and set top box
06/04/2003EP1316149A1 Bandwidth calibration for frequency locked loop
06/04/2003EP0914715B1 Process and device for locking-in a yig-tuned oscillator
06/04/2003EP0889411B1 On-chip PLL phase and jitter self-test circuit
06/04/2003CN1110812C Information storing system of amplitude regulation of clock reference during writing pulse
06/03/2003US6574288 Method and apparatus for adjusting a digital control word to tune synthesized high-frequency signals for wireless communications
06/03/2003US6574287 Frequency/Phase comparison circuit with gated reference and signal inputs
06/03/2003US6573798 PLL system for CRT monitor
06/03/2003US6573776 Timing generation circuit and method for timing generation
06/03/2003US6573771 Clock synchronization circuit having improved jitter property
06/03/2003US6573770 Programmable leakage current offset for delay locked loop
06/03/2003US6573769 Phase-locked loop (PLL) with mixer for subtracting outer-band phase noise
06/03/2003US6573761 Timebase for sampling an applied signal having a synchronous trigger
06/03/2003US6573698 Clock synchronizing method and circuit varying a phase of a synchronous clock in one direction or the other according to a phase difference of the synchronous clock from a reference clock
05/2003
05/30/2003WO2003044961A2 A communication semiconductor integrated circuit device and a wireless communication system
05/30/2003WO2003044960A1 Method and device for phase and frequency comparison
05/30/2003WO2003044952A1 Apparatus for generating multiple clock signals of different frequency characteristics
05/30/2003WO2003044644A1 Method and device for synchronising integrated circuits
05/30/2003WO2002041545A9 Wireless clock synchronization
05/30/2003CA2463114A1 Method and device for phase and frequency comparison
05/29/2003US20030100283 Frequency acquisition and locking detection circuit for phase lock loop
05/29/2003US20030099321 Cascaded delay locked loop circuit
05/29/2003US20030099320 Methods and devices for improving the switching times of PLLs
05/29/2003US20030099319 Expanded comparator for control of digital delay lines in a delay locked loop or phase locked loop
05/29/2003US20030099210 Radio frequency data communications device
05/29/2003US20030099173 Apparatus and method of compensating a phase error in a wobble PLL
05/29/2003US20030099141 Semiconductor device having PLL-circuit
05/29/2003US20030099093 Signal distribution to a plurality of circuit units
05/29/2003US20030098749 Oscillator and electronic device using the same
05/29/2003US20030098745 Phase-locked loop oscillator with loop gain compensation
05/29/2003US20030098732 Device for controlling clock signal phase to reduce clock skew
05/29/2003US20030098730 Semiconductor integrated circuit device
05/29/2003US20030098729 Universal clock generator
05/29/2003US20030098721 Phase comparator accurately comparing phases of two clock signals and clock generation circuit employing the same
05/29/2003US20030098720 Lock detect indicator for a phase locked loop
05/29/2003US20030098696 Method and apparatus for determining system response characteristics
05/28/2003EP1315328A2 Multi-phase sampling
05/28/2003EP1314252A2 Data recovery using data eye tracking
05/28/2003EP1314251A1 Digital clock multiplier and divider with synchronization
05/28/2003CN1420632A Virtual signal generator for generating square wave by remainder interpolation comparision
05/28/2003CN1110179C Digital radio receiver
05/27/2003US6570948 Phase locked loop frequency generating circuit and a receiver using the circuit
05/27/2003US6570947 Phase lock loop having a robust bandwidth and a calibration method thereof
05/27/2003US6570946 One-hot decoded phase shift prescaler
05/27/2003US6570944 Apparatus for data recovery in a synchronous chip-to-chip system
05/27/2003US6570916 Adaptive equalization circuit and method
05/27/2003US6570458 Low noise microwave synthesizer employing high frequency combs for tuning drift cancel loop
05/27/2003US6570457 Phase locked loop using sample and hold after phase detector
05/27/2003US6570456 Clock generator for generating internal clock signal synchronized with reference clock signal
05/27/2003US6570455 Rubidium atom oscillator generating a stable frequency
05/27/2003US6570454 Multiple input phase lock loop with hitless reference switching
05/27/2003US6570453 Synthesizer with lock detector, lock algorithm, extended range VCO, and a simplified dual modulus divider
05/27/2003US6570452 Fractional-N type frequency synthesizer
05/27/2003US6570424 Signal phase adjustment circuit to set optimum phase
05/27/2003US6570423 Programmable current source adjustment of leakage current for phase locked loop
05/27/2003US6570422 Phase locked loop design with switch for loop filter capacitance leakage current control
05/27/2003US6570421 Programmable leakage current offset for phase locked loop
05/27/2003US6570420 Programmable current source adjustment of leakage current for delay locked loop
05/27/2003US6570419 Semiconductor integrated circuit having a clock recovery circuit
05/27/2003US6570418 Timing adjusting circuit
05/22/2003WO2003043194A2 Frequency acquisition and locking detection circuit for phase lock loop
05/22/2003WO2003043175A1 Low noise oscillator
05/22/2003WO2003042709A1 Timing generator and tester
05/22/2003WO2003007478A3 Method and device for producing mobile radio signals
05/22/2003WO2002089405A3 Fibre channel transceiver
05/22/2003WO2002051008A3 Voltage-controlled oscillator with ac coupling to produce highly accurate duty cycle square wave output
05/22/2003US20030095444 Semiconductor memory device for providing address access time and data access time at a high speed
05/22/2003US20030095009 Delay-locked loop circuit and method using a ring oscillator and counter-based delay
05/22/2003US20030095008 Calibration device and method for generating a clock in an integrated circuit
05/22/2003US20030095007 Analog phase-locked oscillator that prevents leakage of harmonics
05/22/2003US20030095001 Balancing circuit, method of operation thereof and a charge pump employing the same
05/22/2003US20030094984 Delay locked loop
05/22/2003US20030094983 Method and device for synchronising integrated circuits
05/22/2003US20030094982 Core sync module
05/21/2003EP1313256A2 Data clock regenerating apparatus
05/21/2003EP1313224A2 Analog phase locked oscillator
05/21/2003EP1313220A1 Apparatus for generating multiple clock signals of different frequency characteristics
05/21/2003EP1312183A1 Apparatus and method for operating a master-slave system with a clock signal and a separate phase signal
05/21/2003EP1312070A1 Method and apparatus for vertically locking input and output video signals
05/21/2003EP1311935A2 Noise-shaped digital frequency synthesis
05/21/2003EP1311933A2 Clock generator, particularly for usb devices
05/21/2003EP1203451B1 Frequency synthesiser
05/21/2003EP1196997B1 Compensation circuit for low phase offset for phase-locked loops
05/21/2003EP0962053B1 Time-discrete phase-locked loop
05/21/2003CN1419343A Tuner containing voltage adapter
05/21/2003CN1109439C Circuit for the acquisition of a carrier signal by applying a substitute pilot to a synchronous demodulator
05/20/2003US6567490 Pulse signal delay circuit
05/20/2003US6567489 Method and circuitry for acquiring a signal in a read channel
05/20/2003US6566970 High-speed, high PSRR, wide operating range voltage controlled oscillator
05/20/2003US6566967 Configurable triple phase-locked loop circuit and method
05/20/2003US6566966 Fast lock/self-tuning VCO based PLL
05/20/2003US6566965 PLL circuit including a DC power source alarm
05/20/2003US6566964 Frequency synthesizer and oscillation frequency control method
05/20/2003US6566924 Parallel push algorithm detecting constraints to minimize clock skew
05/20/2003US6566923 Phase-frequency detector and charge pump with feedback
05/20/2003US6566922 Zero phase and frequency restart PLL
05/20/2003US6566921 Apparatus and method for high resolution frequency adjustment in a multistage frequency synthesizer
05/20/2003US6566920 Phase locked loop using lock detecting circuit
05/20/2003US6564636 Wide band digital phase locked loop (PLL) with a half-frequency output
05/20/2003CA2287642C A process and device to measure the signal quality of a digital information transmission system