Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
12/2002
12/26/2002US20020196060 Compensation circuit for fractional-n frequency PLL synthesizer
12/25/2002CN1387717A Radio transmitter architecture comprising PLL and delta-sigma modulator
12/25/2002CN1387699A Slip-detecting phase detector and method for improving phase-lock loop lock time
12/25/2002CN1387695A Wideband voltage controlled oscillator with good noise immunity
12/25/2002CN1387321A Digital phase-locked loop device and signal generating method
12/25/2002CN1097347C Radio equipment
12/24/2002US6498538 Low jitter integrated phase locked loop with broad tuning range
12/24/2002US6498537 Phase comparison circuit having a controlled delay of an input signal
12/24/2002US6498536 Oscillating circuit for producing an output signal synchronous with an input signal
12/24/2002US6498524 Input/output data synchronizing device
12/19/2002WO2002101947A1 Receiver and ic
12/19/2002WO2002101930A2 High-speed programmable synchronous counter for use in a phase locked loop
12/19/2002WO2002101403A2 Low noise microwave synthesizer employing high frequency combs for tuning drift cancel loop
12/19/2002US20020194518 Apparatus and method for generating a skip signal
12/19/2002US20020193084 Apparatus for generating multiple radio frequencies in communication circuitry and associated methods
12/19/2002US20020191728 Phase locked-loop using sub-sampling
12/19/2002US20020191727 Digital phase locked loop
12/19/2002US20020191726 System and method for synchronizing an asynchronous frequency for use in a digital system
12/19/2002US20020191723 Parallel signal automatic phase adjusting circuit
12/19/2002US20020191719 Differential signal-delaying apparatus, receiver employing the apparatus, and communication system
12/19/2002US20020191431 Bi-direction switching and glitch/spike free multiple phase switch circuit
12/19/2002US20020190810 Filter trimming
12/19/2002US20020190772 Method and apparatus for a clock circuit
12/19/2002US20020190767 Power reduction for delay locked loop circuits
12/19/2002US20020190766 Scheme for delay locked loop reset protection
12/19/2002US20020190765 Signal generating circuit, timing recovery PLL, signal generating system and signal generating method
12/19/2002US20020190764 Digital PLL with conditional holdover
12/19/2002US20020190283 Power supply control device, semiconductor device and method of driving semiconductor device
12/18/2002EP1267525A2 Network interface using programmable delay and frequency doubler
12/18/2002EP1266453A1 High noise rejection voltage-controlled ring oscillator architecture
12/18/2002EP1212829A4 Method and apparatus for automatically compensating a spread spectrum clock generator
12/18/2002EP1118219B1 Multistandard clock recovery circuit
12/18/2002EP1000462B1 Frequency synthesizer systems and methods for three-point modulation with a dc response
12/18/2002EP0929940B1 Frequency synthesizer having phase error feedback for waveform selection
12/18/2002CN1386325A A frequency synthesizer having a phase-locked loop with circuit for reducing power-on switching transients
12/18/2002CN1385967A Quickly-locked double-track digital delay phase-locking circuit
12/17/2002US6496556 Step-down clock control and method for improving convergence for a digitally controlled self-calibrating VCO
12/17/2002US6496555 Phase locked loop
12/17/2002US6496554 Phase lock detection circuit for phase-locked loop circuit
12/17/2002US6496553 PLL for reproducing standard clock from random time information
12/17/2002US6496552 Timing circuit
12/17/2002US6496470 Disk reproducing apparatus having active wide-range PLL device
12/17/2002US6496077 Phase detector for automatically controlling offset current and phase locked loop including the same
12/17/2002US6496076 PLL circuit and recorded data reproduction apparatus
12/17/2002US6496075 Automatic tuning of VCO
12/17/2002US6496056 Process-tolerant integrated circuit design
12/17/2002US6496048 System and method for accurate adjustment of discrete integrated circuit delay lines
12/17/2002US6496046 Method for increasing the control bandwidth of a frequency control circuit
12/17/2002US6496042 Phase comparator for identifying and returning a non-return-to-zero receiving signal
12/12/2002WO2002099974A2 Tunable voltage controlled oscillator circuit having aided acquisition and methods for operating the same
12/12/2002WO2002099973A1 Pll bandwidth switching
12/12/2002WO2002099971A1 Semiconductor integrated circuit
12/12/2002WO2002062029A3 Compensation method for a transceiver using two-point modulation
12/12/2002WO2002056475A3 Phase locked loop
12/12/2002US20020187798 System clock synchronization using phase-locked loop
12/12/2002US20020187763 Apparatus and methods for generating radio frequencies in communication circuitry
12/12/2002US20020186804 Clock recovery circuit
12/12/2002US20020186802 Apparatus and method for adaptively adjusting a timing loop
12/12/2002US20020186713 Communication system with frequency modulation and a single local oscillator
12/12/2002US20020186159 Amplitude detection for controlling the decision instant for sampling as a data flow
12/12/2002US20020186087 Data recovery circuit and method thereof
12/12/2002US20020186072 Voltage controlled oscillation circuit
12/12/2002US20020186065 Circuit for selectively generating an output signal from one or more clock signals
12/12/2002US20020186063 Phase lock loop (PLL) apparatus and method
12/12/2002US20020186055 Fractional-N synthesizer with improved noise performance
12/12/2002DE10126298A1 Verfahren und Vorrichtung zur Messung der Phasenverschiebung zwischen einem periodischen Signal und einem Ausgangssignal an einem Ausgang eines elektronischen Bauelements Method and apparatus for measuring the phase shift between a periodic signal and an output signal at an output of an electronic component
12/11/2002EP1265365A2 Frequency synchronous apparatus and frequency synchronous control method
12/11/2002EP1265364A1 Precision closed loop delay line for wide frequency data recovery
12/11/2002EP1264229A2 A secure asynchronous clock multiplexer
12/11/2002EP1116087B1 Synchronous polyphase clock distribution system
12/11/2002CN1385000A Transceiver with local oscillator frequency settings using demodulated bit rate
12/11/2002CN1384959A Method and apparatus for vertically input and output video signals
12/11/2002CN1384609A Two-mode and three-frequencyband synthesizer
12/10/2002US6493829 Semiconductor device enable to output a counter value of an internal clock generation in a test mode
12/10/2002US6493410 Wide band high resolution synthesizer
12/10/2002US6493408 Low-jitter data transmission apparatus
12/10/2002US6493305 Pulse width control circuit
12/10/2002US6493163 Increased lock range PLL for constrained data
12/10/2002US6492926 Noise compensation device and method in a discrete time control system
12/10/2002US6492852 Pre-divider architecture for low power in a digital delay locked loop
12/10/2002US6492851 Digital phase control circuit
12/10/2002US6492192 Method of making a Schottky diode in an integrated circuit
12/05/2002WO2002098156A1 A method for enabling a subscriber entity to actively communicate in a communication network
12/05/2002WO2002098087A1 Method and apparatus for desynchronizing a ds-3 signal and/or an e3 signal from the data portion of an sts/stm payload
12/05/2002WO2002098005A1 Fractional-n synthesiser and method of synchronisation of the output phase
12/05/2002WO2002097994A1 Differential cmos controlled delay unit
12/05/2002WO2002097993A1 Offset cancellation of charge pump based phase detector in a pll
12/05/2002WO2002097992A2 Low voltage charge pump for use in a phase locked loop
12/05/2002WO2002097991A2 Frequency locked loop, clock recovery circuit and receiver
12/05/2002WO2002097990A2 Ultra low jitter clock generation device and method for storage device
12/05/2002WO2002097547A1 Efficient current-feedback power supply and applications thereof
12/05/2002WO2002039585A3 High bandwidth multi-phase clock selector with continuous phase output
12/05/2002WO2001095490A8 Method of digitally synthesizing frequencies with rational relationships to a reference frequency
12/05/2002US20020184577 Precision closed loop delay line for wide frequency data recovery
12/05/2002US20020183030 Frequency plan
12/05/2002US20020182999 Method and apparatus for tenderizing meat
12/05/2002US20020181934 Timing signal transferring circuit
12/05/2002US20020181640 PLL (Phase-Locked Loop) circuit
12/05/2002US20020181639 Adaptive de-skew clock generation
12/05/2002US20020181608 Combining a clock signal and a data signal