Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
10/2003
10/02/2003US20030185331 Synchronization module and method
10/02/2003US20030185327 Low jitter phase rotator
10/02/2003US20030184646 Multiple synthesized clocks with fractional PPM control from a single clock source
10/02/2003US20030184400 Phase comparison method, phase comparison circuit, and phase locked loop (PLL) type circuit
10/02/2003US20030184394 Wide band, wide operation range, general purpose digital phase locked loop architecture
10/02/2003US20030184393 Area efficient, low power and flexible time digitizer
10/02/2003US20030184390 Compact, high power supply rejection ratio, low power semiconductor digitally controlled oscillator architecture
10/02/2003US20030184389 Inject synchronous narrowband reproducible phase locked looped
10/02/2003US20030184356 Method and apparatus for precise signal interpolation
10/02/2003US20030184355 RDLL circuit for area reduction
10/02/2003US20030184354 Semiconductor integrated circuit
10/02/2003US20030184353 Rail-to-rail charge pump circuit
10/02/2003US20030184352 Circuit with variation correction function
10/02/2003US20030184351 Timing signal occurrence circuit
10/02/2003US20030184347 Glitch free clock multiplexing circuit with asynchronous switch control and minimum switch over time
10/02/2003US20030184278 Device and method for measuring jitter in phase locked loops
10/02/2003US20030183842 System with phase jumping locked loop circuit
10/01/2003EP1349268A2 Large gain range, high linearity, low noise MOS VGA
10/01/2003EP1349266A1 Phase comparison method, phase comparison circuit, and phase locked loop (PLL) type circuit
10/01/2003EP1262016B1 Fractional-n phase locked loop
10/01/2003EP0893886A4 Device for synchronising a digital receiver
10/01/2003CN1446330A Efficient clock start and stop apparatus for clock forwarded system I/O
10/01/2003CN1123206C Horizontal scanning pulse signal control circuit using digital circuit
09/2003
09/30/2003US6629256 Apparatus for and method of generating a clock from an available clock of arbitrary frequency
09/30/2003US6629254 Clocking architecture to compensate a delay introduced by a signal buffer
09/30/2003US6629250 Adjustable data delay using programmable clock shift
09/30/2003US6628739 Digital phase lock loop circuit
09/30/2003US6628276 System for high precision signal phase difference measurement
09/30/2003US6628229 Stabilization of oscillators in a radar level transmitter
09/30/2003US6628173 Data and clock extractor with improved linearity
09/30/2003US6628172 Frequency synthesizer including PLL with fractional division
09/30/2003US6628171 Method, architecture and circuit for controlling and/or operating an oscillator
09/30/2003US6628155 Internal clock generating circuit of semiconductor memory device and method thereof
09/30/2003US6628154 Digitally controlled analog delay locked loop (DLL)
09/30/2003US6628153 PLL circuit and frequency division method reducing spurious noise
09/30/2003US6628112 System and method for detecting phase offset in a phase-locked loop
09/25/2003WO2003079591A1 Desynchronizer having ram based shared digital phase locked loops and sonet high density demapper incorporating same
09/25/2003WO2003079554A2 Phase detector for clock and data recovery at half clock frequency
09/25/2003WO2003079553A1 Sigma-delta modulator controlled phase locked loop with a noise shaped dither
09/25/2003WO2003079551A1 Pll noise smoothing using dual-modulus interleaving
09/25/2003WO2003079548A1 Direct automatic frequency control method and apparatus
09/25/2003WO2003036886A3 Method and system for transferring ip packets by aggregating multiple wireless communication channels for high data rate transfers
09/25/2003WO2003032493A3 Compensating method for a pll circuit that functions according to the two-point principle, and pll circuit provided with a compensating device
09/25/2003WO2003026132A3 A stable frequency or phase-locked loop
09/25/2003WO2003021409A3 Dynamic voltage control method and apparatus
09/25/2003WO2003017492A3 Charge pump
09/25/2003WO2002095943A3 Programmable self-calibrating vernier and method
09/25/2003US20030179842 Digital pattern sequence generator
09/25/2003US20030179785 Phase-locked loop control of passively Q-switched lasers
09/25/2003US20030179028 System with dual rail regulated locked loop
09/25/2003US20030179027 Locked loop with dual rail regulation
09/25/2003US20030179026 Delay lock loop having a variable voltage regulator
09/25/2003US20030179025 Delay lock loop having an edge detector and fixed delay
09/25/2003US20030179024 Method and circuit of locked condition detection for PLL
09/25/2003US20030179014 Frequency comparator with malfunction reduced and phase-locked state detecting circuit using the same
09/24/2003EP1347578A1 Clock architecture and clock device for a monolithic integrated circuit
09/24/2003EP1346480A2 Precision phase generator
09/24/2003EP1346478A1 Architecture for field programmable gate array
09/24/2003EP1141744B1 Method for detecting and correcting non-linearities of high-frequency voltage-controlled oscillators
09/24/2003CN1444338A Frequency modulator, frequency modulation method and radio line
09/24/2003CN1122372C Method and equipment for driving receiver
09/23/2003US6625765 Memory based phase locked loop
09/23/2003US6625559 System and method for maintaining lock of a phase locked loop feedback during clock halt
09/23/2003US6625435 Frequency synthesis using a programmable offset synthesizer
09/23/2003US6625242 Delay locked loops and methods that shift the phase of a delayed clock signal based on a reference phase value
09/23/2003US6624852 Sync signal correcting apparatus for DTV receiver
09/23/2003US6624707 Method and circuit for improving lock-time performance for a phase-locked loop
09/23/2003US6624706 Automatic bias adjustment circuit for use in PLL circuit
09/23/2003US6624705 Control circuit for phase-locked loop (PLL) with reduced cycle slip during acquisition of phase lock
09/23/2003US6624675 Free-running mode device for phase locked loop
09/23/2003US6624674 Method and apparatus for reducing variations on damping factor and natural frequency in phase locked loops
09/23/2003US6624668 Digitally programmable phase-lock loop for high-speed data communications
09/18/2003WO2003077466A1 Device for recovering data from a received data signal
09/18/2003WO2003077465A1 Device and method for recovering data
09/18/2003WO2003077422A2 Calibration techniques for frequency synthesizers
09/18/2003WO2003077417A1 Methods and apparatus for automatic gain control
09/18/2003WO2002097991A3 Frequency locked loop, clock recovery circuit and receiver
09/18/2003US20030176173 Direct automatic frequency control method and apparatus
09/18/2003US20030174799 Sigma-delta modulator controlled phase locked loop with a noise shaped dither
09/18/2003US20030174797 Frequency converter and methods of use thereof
09/18/2003US20030174795 Clock generator, particularly for USB devices
09/18/2003US20030174575 Semiconductor memory device including clock generation circuit
09/18/2003US20030174550 Latency time circuit for an s-dram
09/18/2003US20030174026 Frequency modulator, frequency modulating method, and wireless circuit
09/18/2003US20030174025 Precision oven-controlled crystal oscillator
09/18/2003US20030174003 Semiconductor integrated circuit
09/18/2003US20030173945 Method and apparatus for digital frequency conversion
09/17/2003EP1345375A2 Method and apparatus for frequency modulation
09/17/2003EP1345317A2 Generation of local oscillator inputs for use in a direct conversion receiver
09/17/2003EP1344340A2 Demultiplexer for high data rate signals
09/17/2003EP0855102B1 Compensated delay locked loop timing vernier
09/17/2003CN1442955A Mixing type phase lock loop and its control method
09/16/2003US6622256 System for protecting strobe glitches by separating a strobe signal into pointer path and timing path, filtering glitches from signals on pointer path thereof
09/16/2003US6622255 Digital clock skew detection and phase alignment
09/16/2003US6622010 Frequency synthesizer
09/16/2003US6621882 Method and apparatus for adjusting the clock delay in systems with multiple integrated circuits
09/16/2003US6621853 Frequency synthesizing device and method for dual frequency hopping with fast lock time
09/16/2003US6621762 Non-volatile delay register
09/16/2003US6621675 High bandwidth, high PSRR, low dropout voltage regulator
09/16/2003US6621449 Method for detection and correction of nonlinearities in radio-frequency voltage controlled oscillators