Patents
Sitemap › H03 - Basic electronic circuitry › H03L - Automatic control, starting, synchronisation, or stabilisation of generators of electronic oscillations or pulses › H03L 7 - Automatic control of frequency or phase; Synchronisation
Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
12/2003
12/11/2003WO2003103146A1 Reference vibration generator, its mutual synchronizing system, and its mutual synchronizing method
12/11/2003WO2003032137A3 Deskewing global clock skew using localized adjustable delay circuits
12/11/2003WO2002063771A3 Automatic wireless synchronization of electronic article surveillance systems
12/11/2003US20030229828 Arrangements for self-measurement of I/O timing
12/11/2003US20030229815 Clock generation system
12/11/2003US20030227990 Method and apparatus for reducing data dependent phase jitter in a clock recovery circuit
12/11/2003US20030227989 Method and apparatus for clock-and-data recovery using a secondary delay-locked loop
12/11/2003US20030227813 Semiconductor apparatus which prevents generating noise and being influenced by noise
12/11/2003US20030227341 Voltage-controlled oscillator and frequency synthesizer
12/11/2003US20030227340 LC oscillator with wide tuning range and low phase noise
12/11/2003US20030227334 Self-adjusting oscillator for a USB connectivity interface
12/11/2003US20030227332 Stabilization technique for phase-locked frequency synthesizers
12/11/2003US20030227331 Frequency modulation system and method
12/11/2003US20030227310 Clock recovery circuit
12/11/2003US20030227309 Analog synchronous mirror delay circuit, method of generating a clock and internal clock generator using the same
12/11/2003US20030227308 Delay locked loop circuit with time delay quantifier and control
12/11/2003US20030227307 Auto-adjustment of self-refresh frequency
12/11/2003US20030227305 Method and apparatus for enabling a timing synchronization circuit
12/11/2003US20030227301 Frequency synthesizer for reducing noise
12/10/2003EP1368896A1 Sigma delta fractional-n frequency divider with improved noise and spur performance
12/10/2003EP1368671A2 Built-in-self-test circuitry for testing a phase locked loop circuit
12/10/2003EP0934625B1 Numerical voltage controlled oscillator
12/10/2003CN1461111A Circuit for frequency synthesizer
12/10/2003CN1461110A Self-adjusting device and method for phaselocked loop frequency synthesizer
12/10/2003CN1461109A Phaselocked loop circuit
12/10/2003CN1130899C Apparatus and method for processing high articulation video data vestigial sideband modulaton signal
12/09/2003US6662003 Radio receiver in CMOS integrated circuit
12/09/2003US6661863 Phase mixer
12/09/2003US6661861 Voice-channel frequency synchronization
12/09/2003US6661846 Adaptive clocking mechanism for digital video decoder
12/09/2003US6661754 Information recording apparatus for writable recording media
12/09/2003US6661736 Apparatus and method for distributing a clock signal on a large scale integrated circuit
12/09/2003US6661359 Device and method for generating synchronous numeric signals
12/09/2003US6661300 Ring oscillator and means for controlling the frequency thereof
12/09/2003US6661296 Phase locked state detecting apparatus and image processing apparatus
12/09/2003US6661295 Controllable crystal oscillator
12/09/2003US6661294 Phase-locked loop circuit
12/09/2003US6661293 Method and arrangement for setting a frequency
12/09/2003US6661291 Fractional and rapid response frequency synthesizer, and corresponding frequency synthesizing method
12/09/2003US6661272 Digitally controllable internal clock generating circuit of semiconductor memory device and method for same
12/09/2003US6661267 Coarse calibration circuit using variable step sizes to reduce jitter and a dynamic course calibration (DCC) circuit for a 2 GHz VCO
12/09/2003US6661265 Delay locked loop for generating complementary clock signals
12/09/2003US6661254 Programmable interconnect circuit with a phase-locked loop
12/09/2003US6661213 On-chip filter-regulator, such as one for a microprocessor phase locked loop (PLL) supply
12/09/2003US6658748 Digitally-controlled L-C oscillator
12/04/2003WO2003100980A1 Pll circuit
12/04/2003WO2003100979A1 Phase-locked loop.
12/04/2003WO2003100978A1 Phase-locked loop circuit
12/04/2003WO2003084069A3 Circuit and method for phase error cancellation in frequency diverses
12/04/2003WO2003032568A3 Method and device for the synchronisation of data transmission between two circuits
12/04/2003US20030224749 Semiconductor integrated circuit device for communication
12/04/2003US20030224748 Double-conversion television tuner using a delta-sigma fractional-N PLL
12/04/2003US20030224747 Calibration circuit for VCO
12/04/2003US20030223527 Phase comparator, clock data recovery circuit and transceiver circuit
12/04/2003US20030223525 Method and apparatus for high speed signal recovery
12/04/2003US20030223523 Signal-controlling apparatus and image-forming apparatus
12/04/2003US20030223520 System for clock and data recovery
12/04/2003US20030223488 Fast phase synchronization and retrieval of sequence components in three-phase networks
12/04/2003US20030222726 Voltage controlled oscillator and PLL circuit including voltage controlled oscillator
12/04/2003US20030222725 High frequency signal source and method of generating same using dielectric resonator oscillator (dro) circuit
12/04/2003US20030222723 Fractional-frequency-modulation PLL synthesizer that suppresses spurious signals
12/04/2003US20030222722 Phase locked loop circuit having wide locked range and semiconductor integrated circuit device having the same
12/04/2003US20030222721 Method for operating an oscillator and an electric circuit arrangement and phase locked loop
12/04/2003US20030222720 Semiconductor integrated circuit
12/04/2003US20030222708 Phase locked loop (PLL) frequency synthesizer and method
12/03/2003EP1367709A2 Double-conversion television tuner using a delta-sigma fractional-N PLL
12/03/2003EP1366567A1 Filter trimming
12/03/2003EP1114539B1 Circuit for recovering a data signal and regenerating a clock signal
12/03/2003CN1130096C Circuit and method for controlling mobile station working in slotted paging environment
12/03/2003CN1130052C Receiving circuit of mobile communicating device
12/02/2003US6658240 Multiband frequency generation device and related method
12/02/2003US6658216 Voltage controlled oscillator, FM signal optical transmitter, FM signal optical receiver and FM signal optical transmission system
12/02/2003US6658074 Method and apparatus for reproducing clock signal of low order group signal
12/02/2003US6658043 Method and apparatus for providing multiple spread spectrum clock generator circuits with overlapping output frequencies
12/02/2003US6657986 Variable clock rate correlation circuit and method of operation
12/02/2003US6657919 Delayed locked loop implementation in a synchronous dynamic random access memory
12/02/2003US6657918 Delayed locked loop implementation in a synchronous dynamic random access memory
12/02/2003US6657917 Selective adjustment of voltage controlled oscillator gain in a phase-locked loop
12/02/2003US6657573 Phase to sine amplitude conversion system and method
12/02/2003US6657503 High noise rejection voltage-controlled ring oscillator architecture
12/02/2003US6657500 Method and system of characterization and behavioral modeling of a phase-locked loop for fast mixed signal simulation
12/02/2003US6657488 Offset correction and slicing level adjustment for amplifier circuits
12/02/2003US6657467 Delay control circuit with internal power supply voltage control
12/02/2003US6657466 System and method for generating interleaved multi-phase outputs from a nested pair of phase locked loops
12/02/2003US6657465 Rail-to-rail charge pump circuit
12/02/2003US6657464 Method and circuit to reduce jitter generation in a PLL using a reference quadrupler, equalizer, and phase detector with control for multiple frequencies
12/02/2003US6657463 System for maintaining the stability of a programmable frequency multiplier
12/02/2003US6657456 Programmable logic with on-chip DLL or PLL to distribute clock
11/2003
11/27/2003WO2003098916A2 High-resolution image projection
11/27/2003WO2003098807A1 Low-pass filter for a pll, phase-locked loop and semiconductor integrated circuit
11/27/2003WO2003098806A1 Plo device
11/27/2003WO2003065586A3 Phase-locked-loop with reduced clock jitter
11/27/2003WO2003055075A3 Self-calibrating phase locked loop charge pump system & method
11/27/2003WO2003044961A3 A communication semiconductor integrated circuit device and a wireless communication system
11/27/2003US20030221143 Circuit to manage and lower clock inaccuracies of integrated circuits
11/27/2003US20030220087 Circuit arrangement for phase locked loop, and phase locked loop based method to be used in cellular network terminals
11/27/2003US20030219091 Phase error cancellation circuit and method for fractional frequency dividers and circuits incorporating same
11/27/2003US20030219090 Phase comparator having a flip-flop circuit and a logic circuit
11/27/2003US20030219089 Delay phase-locked loop device and clock signal generating method
11/27/2003US20030219088 Digital DLL apparatus for correcting duty cycle and method thereof
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