Patents
Sitemap › H03 - Basic electronic circuitry › H03L - Automatic control, starting, synchronisation, or stabilisation of generators of electronic oscillations or pulses › H03L 7 - Automatic control of frequency or phase; Synchronisation
Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
10/2003
10/23/2003US20030197565 Lock detector for phase locked loops
10/23/2003US20030197564 Coarse tuning for fractional-n synthesizers
10/23/2003US20030197537 Clock distribution network using feedback for skew compensation and jitter filtering
10/23/2003US20030197536 Method and apparatus for synthesizing a clock signal using a compact and low power delay locked loop (dll)
10/23/2003US20030197535 Method and apparatus for change pump circuit
10/23/2003US20030197534 On chip timing adjustment in multi-channel fast data transfer
10/22/2003EP1355444A2 Clock recovery circuit and data receiving circuit
10/22/2003EP1354407A2 A phase-locked loop
10/22/2003EP1354406A2 Method for operating a pll frequency synthesis circuit
10/22/2003EP1354274A2 Serial link architecture
10/22/2003CN2582276Y Phase-locked loop circuit
10/22/2003CN1451247A Method and apparatus for activating a high frequency clock following a sleep mode with in a mobile station operating in a slotted paging mode
10/22/2003CN1451202A Frequency modulator using a waveform generator
10/22/2003CN1450721A Universal clock generator
10/22/2003CN1450549A Signal processing device and D/A converter
10/22/2003CN1450531A Apparatus for detecting and correcting wobble error and phase ocked loop circuit using the same
10/22/2003CN1450359A Real time clock for GPS receiver
10/21/2003US6636987 Method and device for determining a synchronization fault in a network node
10/21/2003US6636979 System for measuring phase error between two clocks by using a plurality of phase latches with different respective delays
10/21/2003US6636978 Rescheduling data input and output commands for bus synchronization by using digital latency shift detection
10/21/2003US6636727 Phase locked loop system
10/21/2003US6636576 Method for reducing the settling time in PLL circuits
10/21/2003US6636575 Cascading PLL units for achieving rapid synchronization between digital communications systems
10/21/2003US6636573 Precision timing generator system and method
10/21/2003US6636122 Analog frequency locked loop with digital oversampling feedback control and filter
10/21/2003US6636120 Decimated digital phase-locked loop for high-speed implementation
10/21/2003US6636110 Internal clock generating circuit for clock synchronous semiconductor memory device
10/21/2003US6636105 Semiconductor device, a charge pump circuit and a PLL circuit that can suppress a switching noise
10/21/2003US6636095 Semiconductor integrated circuit device
10/21/2003US6636093 Compensation for a delay locked loop
10/21/2003US6636092 Digital receive phase lock loop with cumulative phase error correction
10/21/2003US6636091 System and method for compensating for supply voltage induced clock delay mismatches
10/21/2003US6636090 Phase-locked loop circuit outputting clock signal having fixed phase difference with respect to input clock signal
10/21/2003US6636088 Edge multiplier circuit
10/21/2003US6636086 High performance microwave synthesizer using multiple-modulator fractional-N divider
10/21/2003US6636079 Phase comparing circuit, PLL circuit, televisions broadcasting receiver, and method of comparing phase
10/21/2003US6635867 Atomic fountain apparatus
10/16/2003WO2003085831A2 A method and apparatus for precise signal interpolation
10/16/2003WO2003039002A3 Fractional-r- frequency synthesizer
10/16/2003US20030194978 System and method for coarse/fine PLL adjustment
10/16/2003US20030194038 Delay clock generating apparatus and delay time measuring apparatus
10/16/2003US20030194032 Distributed link module architecture
10/16/2003US20030194024 Apparatus and method for symbol timing recovery
10/16/2003US20030193375 Phase locked loop input receiver design with delay matching feature
10/16/2003US20030193374 PLL for clock recovery with initialization sequence
10/15/2003EP1353326A2 Apparatus for detecting and correcting wobble error and phase locked loop circuit using the same
10/15/2003EP1352476A2 Precision oven-controlled crystal oscillator
10/15/2003EP1352475A1 Pll with phase rotator
10/15/2003EP1143622B1 Phase-locked loop
10/15/2003CN1449613A A modulation technique providing high data rate through band limited channels
10/15/2003CN1449516A Clock-pulse generator unit, especially used for usb-device
10/15/2003CN1449115A Method for generating double frequency pulse using clock
10/14/2003US6633991 Method of switching between a first and second clock signal by establishing a trigger time in which both signals are considered to be substantially in-phase
10/14/2003US6633621 Apparatus and method for synchronizing a clock using a phase-locked loop circuit
10/14/2003US6633201 System and method for determining frequency tolerance without a reference
10/14/2003US6633190 Multi-phase clock generation and synchronization
10/14/2003US6633186 Speed-locked loop to provide speed information based on die operating conditions
10/14/2003US6633185 PLL/DLL circuitry programmable for high bandwidth and low bandwidth applications
10/14/2003US6633184 Phase comparator and synchronizing signal extracting device
10/09/2003WO2003084069A2 Circuit and method for phase error cancellation in frequency diverses
10/09/2003WO2003084068A1 Arrangement and method relating to phase locking comprising storing means
10/09/2003WO2003084067A2 System with dual rail regulated locked loop
10/09/2003WO2003084066A2 System with phase jumping locked loop circuit
10/09/2003WO2002033433A3 Built-in-self-test circuitry for testing a phase locked loop circuit
10/09/2003US20030190879 Method and apparatus for tenderizing meat
10/09/2003US20030190006 Data recovery circuit
10/09/2003US20030190005 Programmable capacitances for PLL loop and power supply noise filters
10/09/2003US20030190004 Synchronous clock phase control circuit
10/09/2003US20030190001 Clock and data recovery circuit for return-to-zero data
10/09/2003US20030189991 Charge pump phase locked loop
10/09/2003US20030189779 Digital VFO device
10/09/2003US20030189505 Signal processing device having a D/A converter with a reduced circuit area without sacificing the resolution
10/09/2003US20030189464 Spurious-free fractional-n frequency synthesizer with multi-phase network circuit
10/09/2003US20030189463 Current saving technique for charge pump based phase locked loops
10/08/2003EP1351429A1 Clock recovery circuit
10/08/2003EP1351428A1 Method and device for clock recovery
10/08/2003EP1351398A1 Multiple synthesized clocks with fractional ppm control from a single clock source
10/08/2003EP1351397A2 All-digital frequency synthesis with capacitive re-introduction of dithered tuning information
10/08/2003EP1351396A1 Charge pump phase locked loop
10/08/2003EP1351395A2 Resetable cascadable divide-by-two circuit
10/08/2003EP1351390A1 Low jitter phase rotator
10/08/2003EP1351381A1 Rail-to-rail charge pump circuit
10/08/2003EP1350333A2 Local oscillator leakage control in direct conversion processes
10/08/2003EP1350324A2 Phase locked loop
10/08/2003EP1350323A1 Device and method in a semiconductor circuit
10/08/2003CN1447935A Noise-shaped digital frequency synthesis
10/08/2003CN1447557A Sync-circuit
10/08/2003CN1123882C Digitl signal reproducing circuit
10/07/2003US6631144 Multi-rate transponder system and chip set
10/07/2003US6630868 Digitally-synthesized loop filter circuit particularly useful for a phase locked loop
10/07/2003US6630860 Programmable phase locked-loop filter architecture for a range selectable bandwidth
10/04/2003CA2424403A1 Multirate digital phase-locked loop for synchronization to disturbed signals
10/02/2003WO2003081779A1 Frequency converter and methods of use thereof
10/02/2003WO2003081775A1 Method and apparatus for digital frequency conversion
10/02/2003WO2003081766A1 Detection of frequency differences between signals
10/02/2003WO2003081731A2 Phase-locked loop control of passively q-switched lasers
10/02/2003WO2003049277A3 Non-linear phase detector
10/02/2003US20030188235 Multi-phase clock generation circuit and clock multiplication circuit
10/02/2003US20030188234 Method and unit for deskewing signals
10/02/2003US20030185336 Resetable cascadable divide-by-two circuit
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