Patents
Sitemap › H03 - Basic electronic circuitry › H03L - Automatic control, starting, synchronisation, or stabilisation of generators of electronic oscillations or pulses › H03L 7 - Automatic control of frequency or phase; Synchronisation
Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
07/2003
07/17/2003US20030132805 Current/voltage converting circuit and phase synchronizing circuit
07/17/2003US20030132804 High-speed phase frequency detection module
07/17/2003US20030132790 Using a push/pull buffer to improve delay locked loop performance
07/17/2003US20030132783 Clock switching circuitry for jitter reduction
07/17/2003US20030132775 Test apparatus for an oscillation circuit incorporated in IC
07/16/2003CN2561167Y Synchronizing signal output device
07/16/2003CN1430120A Electric charge pump with wide output voltage area
07/16/2003CN1114895C Local frequeny correction
07/15/2003US6594772 Clock distribution circuitry to different nodes on integrated circuit with clock coupling circuitry to maintain predetermined phase relation between output and input of adjacent nodes
07/15/2003US6594331 Two phase digital phase locked loop circuit
07/15/2003US6594330 Phase-locked loop with digitally controlled, frequency-multiplying oscillator
07/15/2003US6594197 Semiconductor integrated circuit device
07/15/2003US6594070 Optical communication system, optical receiver and wavelength converter
07/15/2003US6593974 Circuit arrangement for demodulating an intermediate-frequency video signal
07/15/2003US6593826 Wireless phone system with voltage controlled oscillator
07/15/2003US6593821 Frequency controlled oscillator
07/15/2003US6593818 Circuit configuration for the compensation of leakage currents in a voltage-controlled oscillator of a PLL circuit
07/15/2003US6593817 Method and circuit for minimizing glitches in phase-locked loops
07/15/2003US6593815 Full digital phase locked loop and circuitry for utilizing the same
07/15/2003US6593803 Active filter circuit
07/15/2003US6593787 Phase-locked loop circuit
07/15/2003US6593786 Register controlled DLL reducing current consumption
07/15/2003US6593784 Post-silicon bias-generator control for a differential phase locked loop
07/15/2003US6593783 Compensation circuit for fractional-N frequency PLL synthesizer
07/15/2003US6593780 Circuit for selectively generating an output signal from one or more clock signals
07/15/2003US6593773 Power saving circuitry using predictive logic
07/10/2003WO2003056702A1 Method and device for converting a quantized digital value
07/10/2003WO2003041276A3 Cascaded delay locked loop circuit
07/10/2003US20030131155 Phase locked loop
07/10/2003US20030129997 Conference feature for cordless telephone systems
07/10/2003US20030129953 High frequency receiving device
07/10/2003US20030128789 Method and apparatus for periodic phase alignment
07/10/2003US20030128786 Clock data recovery system
07/10/2003US20030128783 Precision timing generator apparatus and associated methods
07/10/2003US20030128782 Method and apparatus for a redundant clock
07/10/2003US20030128779 Method and apparatus for correcting the phase of a clock in a data receiver
07/10/2003US20030128720 Method and apparatus for aligning the clock signals of transceivers in a multiple access communication system utilizing programmable, multi-tap phase-locked loops
07/10/2003US20030128643 VCO and PLL circuit and data recording apparatus
07/10/2003US20030128451 Clock recovery apparatus
07/10/2003US20030128074 Low-jitter loop filter for a phase-locked loop system
07/10/2003US20030128059 Clock controlling method and circuit
07/10/2003CA2470176A1 Method and device for converting a quantized digital value
07/09/2003EP1326284A2 A thick oxide P-gate NMOS capacitor for use in a phase-locked loop circuit and method of making same
07/09/2003EP1326154A1 Charge pump with a very wide output voltage range
07/09/2003EP1325559A1 Method and system for managing reference signals for network clock synchronization
07/09/2003EP1325558A1 Resonator configuration
07/09/2003CN1429426A Apparatus for radio frequency processing with dual modulus synthesizer
07/09/2003CN1428678A Multiphase clock processing circuit and clock frequency multiplier circuit
07/08/2003US6591370 Multinode computer system with distributed clock synchronization system
07/08/2003US6591091 System and method for coarse/fine PLL adjustment
07/08/2003US6590461 Frequency conversion apparatus and method
07/08/2003US6590459 Phase lock circuit
07/08/2003US6590458 Clock generator circuit with a PLL having an output frequency cycled in a range to reduce unwanted radiation
07/08/2003US6590457 Phase detector and clock regeneration device
07/08/2003US6590434 Delay time controlling circuit and method for controlling delay time
07/08/2003US6590427 Phase frequency detector circuit having reduced dead band
07/08/2003US6590426 Digital phase detector circuit and method therefor
07/08/2003US6590376 Method of deriving a frequency of a pulse signal from alternate sources and method of calibrating same
07/08/2003US6589170 Medical telemetry system with cellular reception of patient data
07/03/2003WO2003055075A2 Self-calibrating phase locked loop charge pump system & method
07/03/2003US20030126487 Method and apparatus for clock and power control in wireless systems
07/03/2003US20030124810 Thick oxide P-gate NMOS capacitor for use in a phase-locked loop circuit and method of making same
07/03/2003US20030123597 Clock synchronization device
07/03/2003US20030123596 Frequency synthesizer for dual mode receiver
07/03/2003US20030123594 Phase interpolator based clock recovering
07/03/2003US20030123591 Multi-phase sampling
07/03/2003US20030123589 Phase interpolator
07/03/2003US20030123571 All-digital symbol clock recovery loop for synchronous coherent receiver systems
07/03/2003US20030122630 Programmable oscillator circuit
07/03/2003US20030122627 Variable delay circuit, and differential voltage-controlled ring oscillator using the same, and PLL using the oscillator
07/03/2003US20030122626 Load pump with an extremely wide output voltage
07/03/2003US20030122600 Circuit arrangement for recovering clock and data from a received signal
07/03/2003US20030122599 Clock synchronization device
07/03/2003US20030122598 Synchronous mirror delay circuit with adjustable locking range
07/03/2003US20030122596 Clock controlling method and circuit
07/03/2003US20030122588 Voltage controller for a highly linear phase interpolator
07/02/2003EP1324619A2 An improved fractional divider
07/02/2003EP1323234A2 Digital phase shifter
07/02/2003EP1323233A2 Synchornized mutli-output digital clock manager
07/02/2003EP1323232A1 Element made of acoustic active material
07/02/2003EP0847139B1 Delay difference adjustment circuit and phase adjuster
07/02/2003CN1427547A Pll电路 Pll circuit
07/02/2003CN1113477C Receiver and transceiver
07/02/2003CN1113465C PLL circuit and its automatic adjusting circuit
07/01/2003USH2069 Signal processor
07/01/2003US6587534 Delay lock loop with clock phase shifter
07/01/2003US6587533 Method for attenuating transients caused by aligning in a desynchronizer
07/01/2003US6587532 Method of generating a clock signal in a module of a data transmission system, and correspondingly equipped data transmission system
07/01/2003US6587531 Clock recovery circuit and a receiver having a clock recovery circuit
07/01/2003US6587529 Phase detector architecture for phase error estimating and zero phase restarting
07/01/2003US6587005 PLL circuit having a variable output frequency
07/01/2003US6586983 Signal phase adjustment circuit to set optimum phase
07/01/2003US6586979 Method for noise and power reduction for digital delay lines
07/01/2003US6586978 Delay locked loop
07/01/2003US6586977 Four quadrant analog mixer-based delay-locked loop for clock and data recovery
07/01/2003US6586976 Charge pump circuit for improving switching characteristics and reducing leakage current and phase locked loop having the same
06/2003
06/26/2003WO2003052937A1 Low noise synthesiser
06/26/2003WO2003052936A1 Improvements relating to frequency synthesis
06/26/2003WO2002091576A3 Frequency control circuit
06/26/2003WO2002057924A3 Serial link architecture
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