| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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| 02/04/2004 | EP1044504B1 Method and apparatus for reducing load pull in a phase locked loop frequency source |
| 02/04/2004 | CN1473430A Mixed-media telecommunication call set-up |
| 02/04/2004 | CN1472886A Multiplexer input circuit with DLL phase detector |
| 02/04/2004 | CN1137538C PLL for reproducing standard clock from random time information |
| 02/03/2004 | US6687866 LSI having a built-in self-test circuit |
| 02/03/2004 | US6687841 Wide frequency range PLL clock generating circuit with delta sigma modulating circuitry for reducing the time changing ratio of the input voltage of a voltage controlled oscillator |
| 02/03/2004 | US6687322 Dual mode clock alignment and distribution device |
| 02/03/2004 | US6687321 Digital PLL circuit |
| 02/03/2004 | US6687320 Phase lock loop (PLL) clock generator with programmable skew and frequency |
| 02/03/2004 | US6687169 Semiconductor memory device for providing address access time and data access time at a high speed |
| 02/03/2004 | US6686969 Display device |
| 02/03/2004 | US6686809 Filter trimming |
| 02/03/2004 | US6686805 Ultra low jitter clock generation device and method for storage drive and radio frequency systems |
| 02/03/2004 | US6686804 Frequency synthesizer using a VCO having a controllable operating point, and calibration and tuning thereof |
| 02/03/2004 | US6686803 Integrated circuit incorporating circuitry for determining which of at least two possible frequencies is present on an externally provided reference signal and method therefor |
| 02/03/2004 | US6686802 Microcomputer having built-in phase locked loop circuit synchronized with external clock and detecting an interruption of the external clock by utilizing continuous outputs of the PLL circuit |
| 02/03/2004 | US6686794 Differential charge pump |
| 02/03/2004 | US6686788 Delay circuit of clock synchronization device using delay cells having wide delay range |
| 02/03/2004 | US6686785 Deskewing global clock skew using localized DLLs |
| 02/03/2004 | US6686784 Hybrid phase-locked loop |
| 02/03/2004 | US6686777 Phase detector having improved timing margins |
| 01/29/2004 | WO2004010622A1 Techniques to reduce transmitted jitted in communication system |
| 01/29/2004 | WO2004010621A2 Staged locking of two phase locked loops |
| 01/29/2004 | WO2004010587A1 Signal processing device, non-integer divider, and fractional n-pll synthesizer using the same |
| 01/29/2004 | WO2004010583A1 Loop filter capacitor leakage current control |
| 01/29/2004 | WO2003069781A3 Pll arrangement, charge pump, method for charge regulation and mobile transceiver |
| 01/29/2004 | WO2003049292A3 Single-chip digital phase frequency synthesiser |
| 01/29/2004 | WO2003040900A3 Clocking and synchronization circuitry |
| 01/29/2004 | US20040019837 Fast detection of incorrect sampling in an oversampling clock and data recovery system |
| 01/29/2004 | US20040017873 Analog delay locked loop characterization technique |
| 01/29/2004 | US20040017872 Phase and frequency lock detector |
| 01/29/2004 | US20040017871 Techniques to regenerate a signal |
| 01/29/2004 | US20040017518 High-resolution image projection |
| 01/29/2004 | US20040017263 Phase-locked loop oscillator with counter bypass |
| 01/29/2004 | US20040017261 Input jitter attenuation in a phase-locked loop |
| 01/29/2004 | US20040017241 Clock control method and circuit |
| 01/29/2004 | US20040017240 Apparatus and method for delay matching of full and divided clock signals |
| 01/29/2004 | US20040017234 VCC adaptive dynamically variable frequency clock system for high performance low power microprocessors |
| 01/29/2004 | DE10202879B4 DLL-(Delay-Locked-Loop)Schaltung DLL (Delay-Locked-Loop) circuit |
| 01/29/2004 | DE10143051B4 Verzögerungsregelkreis zum Reduzieren der Last einer variablen Verzögerungseinheit beim Hochfrequenzbetrieb und zum stabilen Verriegeln eines externen Taktsignals Delay locked loop for reducing the load of a variable delay unit in the high frequency operation, and for stable locking of an external clock signal |
| 01/28/2004 | EP1385305A1 Signal conditioning circuit with input equalization and output pre-emphasis |
| 01/28/2004 | EP1385304A2 Multiple high-speed bit stream interface circuit |
| 01/28/2004 | EP1385267A1 Generation of clock phases for specific IC interfaces |
| 01/28/2004 | EP1384313A1 Automatic tuning of vco |
| 01/28/2004 | EP1384312A1 Tunable voltage controlled oscillator |
| 01/28/2004 | EP1384286A1 Inverted-f ferroelectric antenna |
| 01/28/2004 | EP1384285A1 Ferroelectric antenna and method for tuning same |
| 01/28/2004 | CN1471760A Frequency locked loop, clock recovery circuit and receiver |
| 01/28/2004 | CN1471756A Segmental spectrum clock generator apparatus and mehtod for using same |
| 01/28/2004 | CN1471233A Exterded amount control device |
| 01/28/2004 | CN1471232A Clock restoring circuit phase discriminator design method and structure for realising same |
| 01/28/2004 | CN1471231A Phase detector without flutter generating in clock return circuit |
| 01/27/2004 | US6684059 Frequency generation in a wireless communication system |
| 01/27/2004 | US6683928 Process, voltage, temperature independent switched delay compensation scheme |
| 01/27/2004 | US6683920 Dual-loop system and method for frequency acquisition and tracking |
| 01/27/2004 | US6683918 High precision, low phase noise synthesizer with vector modulator |
| 01/27/2004 | US6683830 Apparatus and method for detecting wobble defect |
| 01/27/2004 | US6683509 Voltage controlled oscillators |
| 01/27/2004 | US6683506 CMOS phase locked loop with voltage controlled oscillator having realignment to reference and method for the same |
| 01/27/2004 | US6683503 Semiconductor integrated circuit having oscillators or oscillation circuits connected to a wiring line at connection points with intervals in length therebetween |
| 01/27/2004 | US6683502 Process compensated phase locked loop |
| 01/27/2004 | US6683501 High speed digitally voltage controlled oscillator |
| 01/27/2004 | US6683478 Apparatus for ensuring correct start-up and phase locking of delay locked loop |
| 01/22/2004 | WO2004008071A1 Methods and apparatus for delay free phase shifting in correcting pll phase offset |
| 01/22/2004 | US20040014505 Method of saving power by reducing active reception time in standby mode |
| 01/22/2004 | US20040013217 Techniques to reduce transmitted jitter |
| 01/22/2004 | US20040013216 Techniques to reduce transmitted jitter |
| 01/22/2004 | US20040013215 Encoded clocks to distribute multiple clock signals to multiple devices in a computer system |
| 01/22/2004 | US20040012577 Synthesizing a pixel clock with extremely close channel spacing |
| 01/22/2004 | US20040012453 Phase controlled oscillator |
| 01/22/2004 | US20040012452 Frequency Adjustable oscillator and methods of operation |
| 01/22/2004 | US20040012448 PLL circuit and method for eliminating self-jitter in a signal which is received by a control circuit |
| 01/22/2004 | US20040012447 Multiple PLL oscillator and multiple CW radar used therefore |
| 01/22/2004 | US20040012429 Device and method in a semiconductor circuit |
| 01/22/2004 | US20040012427 Delay locked loop dll in semiconductor device |
| 01/22/2004 | US20040012426 Delay locked loop design with diode for loop filter capacitance leakage current control |
| 01/22/2004 | US20040012425 Charge-pump phase-locked loop circuit with charge calibration |
| 01/22/2004 | US20040012424 Techniques to control signal phase |
| 01/22/2004 | US20040012423 Phase locked loop circuit using fractional frequency divider |
| 01/22/2004 | US20040012422 Systems to control signal phase |
| 01/22/2004 | US20040012421 Phase locked loop design with diode for loop filter capacitance leakage current control |
| 01/22/2004 | US20040012420 Design-for-test technique for a delay locked loop |
| 01/22/2004 | US20040012414 Interleaved pulse-extended phase detector |
| 01/22/2004 | DE10200698B4 Genaues Zeitverzögerungssystem und Verfahren unter Verwendung eines ungenauen Oszillators Exact time delay system and method using an inaccurate oscillator |
| 01/21/2004 | EP1383244A1 Multiple PLL oscillator and multiple CW radar using such an oscillator |
| 01/21/2004 | EP1383243A1 Locked Loop Circuit Design with Diode for Loop Filter Capacitance Leakage Current Control |
| 01/21/2004 | EP1382083A1 Tunable multiplexer |
| 01/21/2004 | EP1381930A1 Synchronous receiver with digital locked loop (dll) and clock detection |
| 01/21/2004 | CN1469550A 半导体集成电路 The semiconductor integrated circuit |
| 01/21/2004 | CN1135839C Output time-base corrector |
| 01/21/2004 | CN1135832C Phase-locked loop circuit |
| 01/21/2004 | CN1135781C Clock and data regenerator for gigabit signals |
| 01/21/2004 | CN1135779C Plesiochronous digital hierarchy low-speed signal switching system digital type phase-locked loop and signal switching method thereof |
| 01/21/2004 | CN1135702C Multi-synthesizer control system and control method for personal hand phone system |
| 01/21/2004 | CN1135701C Frequency divider circuit and digital phase-locked loop circuit |
| 01/21/2004 | CN1135687C Radio-frequency transceiver and method for receiving & transmitting radio-frequency signal |
| 01/20/2004 | US6680992 Clock identification and reproduction circuit |
| 01/20/2004 | US6680991 Detection of frequency differences between signals |
| 01/20/2004 | US6680989 Method and apparatus for clock switching |
| 01/20/2004 | US6680988 Non-linear extraction circuit and clock extraction circuit |