Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
10/2005
10/20/2005US20050231246 Power-up detector
10/20/2005US20050231244 Mothod and apparatus for ensuring synchronization of clocks in a multiple clock system
10/20/2005US20050231176 Conversion circuit for discriminating sourcing current and sinking current
10/20/2005US20050230730 Semiconductor integrated circuit device and frequency modulation device
10/19/2005EP1205065B1 Method and apparatus for providing a clock signal with high frequency accuracy
10/19/2005CN1685656A Clock signal extraction device and method for extracting clock signal from data signal
10/19/2005CN1685616A Digital delta-sigma modulator in a fractional-N frequency synthesizer
10/19/2005CN1685614A Voltage-controlled oscillator presetting circuit
10/19/2005CN1685613A Phase locked loop
10/19/2005CN1685421A Delay signal generation device and recording pulse generation device
10/19/2005CN1684405A Clock synchronizer and clock and data recovery apparatus and method
10/19/2005CN1224178C Anti noise and burst mode receiving equipment and method for recovering clock signal and its data
10/19/2005CN1224174C Phase conversion bimodulux prescaler circuit with device for reducing power consumption
10/19/2005CN1224173C Analogue PLL with repetitive sample filter possessing switching capacitor
10/19/2005CN1224168C Apparatus/method for distributing clock signal
10/19/2005CN1224010C Method and apparatus for generating write-in clock in optical-disc writer
10/18/2005US6956923 High speed phase detector architecture
10/18/2005US6956920 Apparatus and method for low power routing of signals in a Low Voltage Differential Signaling system
10/18/2005US6956793 Phase clock selector for generating a non-integer frequency division
10/18/2005US6956442 Ring oscillator with peaking stages
10/18/2005US6956441 Phase locked state detecting apparatus and image processing apparatus
10/18/2005US6956440 PLL having a controller for dividing values of a VCO
10/18/2005US6956423 Interleaved clock signal generator having serial delay and ring counter architecture
10/18/2005US6956419 Fail-safe zero delay buffer with automatic internal reference
10/18/2005US6956418 Delay locked loop device
10/18/2005US6956417 Leakage compensation circuit
10/18/2005US6956416 Powerup control of PLL
10/18/2005US6956415 Modular DLL architecture for generating multiple timings
10/18/2005US6956414 System and method for creating a limited duration clock divider reset
10/13/2005WO2005096578A1 Method and apparatus for use in carrier recovery in a communications system
10/13/2005WO2005096502A1 Multiple stage delta sigma modulators
10/13/2005WO2005094341A2 Power up clear (puc) signal generators having input references that track process and temperature variations
10/13/2005US20050229228 Unicast cable content delivery
10/13/2005US20050229226 Method employing power-saving modes in electronic devices decoding and displaying multimedia-programs
10/13/2005US20050229222 Method employing personal multimedia-program recording applications in electronic devices
10/13/2005US20050227629 High agility frequency synthesizer phase-locked loop
10/13/2005US20050227627 Programmable radio transceiver
10/13/2005US20050226357 Automatic frequency correction PLL circuit
10/13/2005US20050226170 System, method, and apparatus for secure sharing of multimedia content across several electronic devices
10/13/2005US20050226102 Dynamic copy window control for domain expansion reading
10/13/2005US20050225402 Circuit for generating spread spectrum clock
10/13/2005US20050225401 Oscillator with improved parameter variation tolerance
10/13/2005US20050225400 Voltage-controlled oscillator and quadrature modulator
10/13/2005US20050225399 Voltage controlled oscillator and PLL circuit
10/13/2005US20050225380 High bandwidth, high PSRR, low dropout voltage regulator
10/13/2005US20050225368 Phase detector for reducing noise
10/13/2005US20050225367 Methods and system for reducing effects of digital loop dead zones
10/13/2005US20050225366 Phase locked loop with adaptive loop bandwidth
10/13/2005US20050225365 Electronic circuits
10/13/2005US20050225330 High frequency delay circuit and test apparatus
10/13/2005DE10113196B4 Verfahren und Systeme zur Datenratenerfassung für serielle Mehrfachgeschwindigkeits-Einbettungs-Takt- Empfänger Methods and systems for data rate detection for multi-speed serial embedding clock receiver
10/12/2005EP1585313A2 Method, network, and apparatus for on-demand independent multimedia information distribution
10/12/2005EP1584929A2 High performance signal generation
10/12/2005EP1234379B1 Device and method for production of a clock signal
10/12/2005CN1682501A System for efficient recovery of node-B buffered data following MAC layer reset
10/12/2005CN1682476A Techniques to reduce transmitted jitter
10/12/2005CN1682446A Phase locked loop
10/12/2005CN1682435A Trimming of a two point phase modulator
10/12/2005CN1682432A Voltage controlled LC tank oscillator
10/12/2005CN1681230A Test signal generation circuit, and reception circuit
10/12/2005CN1681210A Low noise charging pump for phase lock loop frequency synthesizer
10/12/2005CN1681196A Annular voltage controlled oscillator
10/12/2005CN1223090C Method for operating oscillator and electric circuit arrangement and phase-locked loop
10/11/2005US6954873 Implementation of wait-states
10/11/2005US6954626 High frequency receiving device
10/11/2005US6954511 Phase-locked loop circuit and delay-locked loop circuit
10/11/2005US6954510 Phase-locked loop lock detector circuit and method of lock detection
10/11/2005US6954506 Clock signal recovery circuit used in receiver of universal serial bus and method of recovering clock signal
10/11/2005US6954114 NCO with rational frequency and normalized phase
10/11/2005US6954113 Programmable oscillator circuit
10/11/2005US6954110 Replica cell for ring oscillator
10/11/2005US6954109 Provision of local oscillator signals
10/11/2005US6954097 Method and apparatus for generating a sequence of clock signals
10/11/2005US6954095 Apparatus and method for generating clock signals
10/11/2005US6954092 Charge pump circuit and PLL circuit using same
10/11/2005US6954091 Programmable phase-locked loop
10/11/2005US6954090 Charge pump having reduced switching noise
10/11/2005US6954089 Frequency converter having low supply voltage
10/11/2005US6954088 Voltage controlled oscillator (VCO) with amplitude control
10/06/2005WO2005093956A1 Pll circuit
10/06/2005WO2005093955A1 Fast phase-frequency detector arrangement
10/06/2005WO2005093954A1 Device comprising a frequency divider
10/06/2005WO2005093952A1 Switched capacitor filter and feedback system
10/06/2005WO2005093945A1 Broadband subharmonic sampling phase detector
10/06/2005WO2005092044A2 Monolithic clock generator and timing/frequency reference
10/06/2005WO2005092042A2 Transconductance and current modulation for resonant frequency control and selection
10/06/2005WO2005043745A3 Fast-hopping frequency synthesizer
10/06/2005WO2005004315A3 Chopped charge pump
10/06/2005US20050221780 Charge pump circuit having switches
10/06/2005US20050221776 Test signal generation circuit, and reception circuit
10/06/2005US20050221773 Tuning system
10/06/2005US20050221746 Method and apparatus for tenderizing meat
10/06/2005US20050220242 Locking-status judging circuit for digital PLL circuit
10/06/2005US20050220241 Mean power frequency discriminator, frequency phase locked loop circuit and digital television demodulator using the same
10/06/2005US20050220240 Clock synchroniser and clock and data recovery apparatus and method
10/06/2005US20050220237 Method and arrangement for sampling
10/06/2005US20050220236 Data receiver with servo controlled delayed clock
10/06/2005US20050220182 Phase comparison circuit and clock recovery circuit
10/06/2005US20050220181 Phase-locked loop with incremental phase detectors and a converter for combining a logical operation with a digital to analog conversion
10/06/2005US20050219564 Image forming device, pattern formation method and storage medium storing its program