| Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643) |
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| 01/12/2006 | US20060008042 Analog unidirectional serial link architecture |
| 01/12/2006 | US20060006954 Voltage controlled lc tank oscillator |
| 01/12/2006 | US20060006953 Frequency synthesizer and method for operating a frequency synthesizer |
| 01/12/2006 | US20060006952 Frequency synthesizer and method for operating a frequency synthesizer |
| 01/12/2006 | US20060006951 Digital control loop to improve phase noise performance and rx/tx linearity |
| 01/12/2006 | US20060006918 Clock distribution network using feedback for skew compensation and jitter filtering |
| 01/12/2006 | US20060006914 Method of implementing multi-transfer curve phase lock loop |
| 01/12/2006 | US20060006913 Integrated circuit comprising series-connected subassemblies |
| 01/12/2006 | US20060005436 Backhoe pivot joint |
| 01/12/2006 | DE19811489B4 Portabler Hochfrequenzsender Portable radio frequency transmitter |
| 01/12/2006 | DE10024640B4 Verzögerungssignal-Erzeugungsvorrichtung und Halbleiterprüfvorrichtung Delay signal generating apparatus and semiconductor testing |
| 01/11/2006 | CN1720664A Phase-locked loop comprising a sigma-delta modulator |
| 01/11/2006 | CN1720663A Phase locked loop with a modulator |
| 01/11/2006 | CN1719732A Time pulse return apparatus of low voltage differential signal and method thereof |
| 01/11/2006 | CN1236620C Video frequency signal compressor and its compressing method |
| 01/11/2006 | CN1236561C Phase locked loop for recovering clock signal from data signal |
| 01/10/2006 | US6986072 Register capable of corresponding to wide frequency band and signal generating method using the same |
| 01/10/2006 | US6985701 Frequency synthesizer and multi-band radio apparatus using said frequency synthesizer |
| 01/10/2006 | US6985551 Linear dead-band-free digital phase detection |
| 01/10/2006 | US6985540 AM demodulator |
| 01/10/2006 | US6985401 Memory device having delay locked loop |
| 01/10/2006 | US6985092 Robust system for transmitting and receiving map data |
| 01/10/2006 | US6985049 Switched coupler type digital phase shifter using quadrature generator |
| 01/10/2006 | US6985044 Varactor folding technique for phase noise reduction in electronic oscillators |
| 01/10/2006 | US6985043 Atomic oscillator |
| 01/10/2006 | US6985040 Voltage controlled oscillator and method of generating an oscillating signal |
| 01/10/2006 | US6985016 Precision closed loop delay line for wide frequency data recovery |
| 01/08/2006 | CA2511694A1 Mixed-signal thermometer filter, delay locked loop and phase locked loop |
| 01/08/2006 | CA2474111A1 Method and apparatus for mixed-signal dll/pll as usefull in timing manipulation |
| 01/05/2006 | WO2006002374A1 Synchronization between low frequency and high frequency digital signals |
| 01/05/2006 | WO2006001952A2 Low power and low timing jitter phase-lock loop and method |
| 01/05/2006 | WO2006000611A1 Frequency synthesizer |
| 01/05/2006 | WO2006000512A1 Reduction of the settling time and compensation of phase errors of frequency synthesizers based on phase-locking loops |
| 01/05/2006 | WO2006000252A1 Improved jitter generation |
| 01/05/2006 | WO2006000095A1 Universal heterodyne timing system |
| 01/05/2006 | US20060003730 Single chip radio receiver with decoder and controllable baseband filter |
| 01/05/2006 | US20060003720 System and method for tuning a frequency generator using an LC oscillator |
| 01/05/2006 | US20060002478 Coding image signal |
| 01/05/2006 | US20060001494 Cascaded locked-loop circuits deriving high-frequency, low noise clock signals from a jittery, low-frequency reference |
| 01/05/2006 | US20060001482 Filter device |
| 01/05/2006 | US20060001465 Register controlled delay locked loop and its control method |
| 01/05/2006 | US20060001464 Digital PLL circuit |
| 01/05/2006 | US20060001462 Digital duty cycle corrector |
| 01/05/2006 | DE10219857B4 PLL-Schaltung und Verfahren zur Eliminierung von Eigenjitter eines von einer Regelungsschaltung empfangenen Signals PLL circuit and method for eliminating intrinsic jitter of a received signal from a control circuit |
| 01/05/2006 | DE102004031913A1 Ladungspumpe einer Phasenregelschleife mit umschaltbarer Systembandbreite und Verfahren zur Steuerung einer solchen Ladungspumpe A charge pump phase locked loop with switchable bandwidth system and method for controlling such a charge pump |
| 01/05/2006 | DE10102887B4 Verzögerungsvorrichtung, die eine Verzögerungssperrschleife aufweist und Verfahren zum Kalibrieren derselben Delay means having a delay lock loop and method of calibrating same |
| 01/04/2006 | EP1612993A1 Method and arrangement for changing the operation mode of an agent of a management network |
| 01/04/2006 | EP1612946A1 Apparatus comprising a sigma-delta modulator and method of generating a quantized signal in a sigma-delta modulator |
| 01/04/2006 | EP1612945A1 Frequency synthesizer and method of operating a frequency synthesizer |
| 01/04/2006 | EP1612944A1 Frequency synthesizer and method of operating a frequency synthesizer |
| 01/04/2006 | EP1612943A1 PLL circuit and phase control method of PLL circuit |
| 01/04/2006 | EP1612931A1 Circuit for driving a voltage controlled oscillator for frequency modulation |
| 01/04/2006 | EP1612690A2 Apparatus and method for receiving parallel data |
| 01/04/2006 | EP1611684A1 Method of establishing an oscillator clock signal |
| 01/04/2006 | EP1611674A1 Linear phase detector with multiplexed latches |
| 01/04/2006 | EP1611673A1 Fast linear phase detector |
| 01/04/2006 | EP1611583A1 Circuit for use in frequency or phase detector |
| 01/04/2006 | EP1368671B1 Built-in-self-test circuitry for testing a phase locked loop circuit |
| 01/04/2006 | EP1095457B1 Method for tuning the bandwidth of a phase-locked loop |
| 01/04/2006 | CN1717892A Method for automatically detecting the clock frequency of a system clock pulse for the configuration of a peripheral device |
| 01/04/2006 | CN1717868A Phase comparison circuit and CDR circuit |
| 01/04/2006 | CN1717057A Coding image signal |
| 01/04/2006 | CN1716836A Read enable generator, read enable signal generating method and data transmission method |
| 01/04/2006 | CN1716784A PLL circuit and high-frequency receiving device |
| 01/04/2006 | CN1716783A Register controlled delay locked loop and its control method |
| 01/04/2006 | CN1716782A Digital delay locked loop capable of correcting duty cycle and its method |
| 01/04/2006 | CN1716760A Numerically controlled oscillator and method of operation |
| 01/04/2006 | CN1716214A Decision feedback equalization input buffer |
| 01/04/2006 | CN1235341C Method and system capable of synchronizing clock signal sources of different semiconductor components |
| 01/03/2006 | US6983387 Microprocessor chip simultaneous switching current reduction method and apparatus |
| 01/03/2006 | US6982995 Multi-channel SONET/SDH desynchronizer |
| 01/03/2006 | US6982604 CDR lock detector with hysteresis |
| 01/03/2006 | US6982592 Zero if complex quadrature frequency discriminator and FM demodulator |
| 01/03/2006 | US6982581 Duty cycle correction circuit |
| 01/03/2006 | US6982580 Speed-locked loop to provide speed information based on die operating conditions |
| 01/03/2006 | US6982579 Digital frequency-multiplying DLLs |
| 01/03/2006 | US6982578 Digital delay-locked loop circuits with hierarchical delay adjustment |
| 01/03/2006 | US6982577 Power-on reset circuit |
| 01/03/2006 | US6982576 Signal delay compensating circuit |
| 01/03/2006 | CA2233233C Frequency controlling circuit for digital television transmission |
| 01/03/2006 | CA2233213C Transmitting system and method |
| 12/29/2005 | WO2005125015A2 Method and apparatus for time measurement |
| 12/29/2005 | WO2005060103A3 A phase locked loop that sets gain automatically |
| 12/29/2005 | WO2004114091A3 Multiple clock generator with programmable clock skew |
| 12/29/2005 | WO2004093327A3 Receiver architectures utilizing coarse analog tuning and associated methods |
| 12/29/2005 | US20050289432 Read enable generator for a turbo decoder deinterleaved symbol memory |
| 12/29/2005 | US20050289427 Per-pin clock synthesis |
| 12/29/2005 | US20050289405 Fast synchronization of a number of digital clocks |
| 12/29/2005 | US20050289379 System and method for producing precision timing signals |
| 12/29/2005 | US20050289246 Interpreting I/O operation requests from pageable guests without host intervention |
| 12/29/2005 | US20050286672 Phase splitter using digital delay locked loops |
| 12/29/2005 | US20050286671 PLL circuit and phase control method of PLL circuit |
| 12/29/2005 | US20050286667 Method and circuit for adjusting the timing of output data based on the current and future states of the output data |
| 12/29/2005 | US20050286643 Transmitter circuit, receiver circuit, clock data recovery phase locked loop circuit, data transfer method and data transfer system |
| 12/29/2005 | US20050286505 Method and apparatus for generating a phase dependent control signal |
| 12/29/2005 | US20050286320 Jitter and skew suppressing delay control apparatus |
| 12/29/2005 | US20050285692 Frequency synthesizer |
| 12/29/2005 | US20050285688 Phase moulation apparatus, polar modulation transmission apparatus, wireless transmission apparatus and wireless communication apparatus |
| 12/29/2005 | US20050285687 Method and apparatus for noise compensation in an oscillator circuit |
| 12/29/2005 | US20050285686 Circuit for driving a voltage controlled oscillator for frequency modulation |