Patents
Sitemap › H03 - Basic electronic circuitry › H03L - Automatic control, starting, synchronisation, or stabilisation of generators of electronic oscillations or pulses › H03L 7 - Automatic control of frequency or phase; Synchronisation
Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
06/2005
06/07/2005US6903583 Power supply shutdown control
06/07/2005US6903582 Integrated circuit timing debug apparatus and method
06/02/2005WO2005050904A1 Clock recovery circuit and communication device
06/02/2005WO2005050854A1 Fm/am receiver circuit and semiconductor integrated circuit thereof
06/02/2005WO2005050844A1 Variable delay circuit
06/02/2005WO2005050843A1 Semiconductor device
06/02/2005WO2005050231A1 Timing comparator, data sampling device, and test device
06/02/2005WO2005034356A3 Phase-locked loop bandwidth calibration circuit and method thereof
06/02/2005WO2004095240A3 A method and apparatus for detecting on-die voltage variations
06/02/2005US20050118973 Low leakage local oscillator system
06/02/2005US20050117680 Frequency and phase correction in a phase-locked loop (PLL)
06/02/2005US20050117517 Multichannel communications link receiver having parallel optical components
06/02/2005US20050117404 Linear half-rate phase detector and clock and data recovery circuit
06/02/2005US20050116783 Phase detector for a programmable clock synchronizer
06/02/2005US20050116782 Loop filter with active capacitor and method for generating a reference
06/02/2005US20050116781 Communication semiconductor integrated circuit device and wireless communication system
06/02/2005US20050116757 Voltage controlled oscillator delay cell
06/02/2005US20050116754 Reset circuit
06/02/2005US20050116750 Data recovery device using a sampling clock with a half frequency of data rate
06/02/2005US20050116219 RF circuits including transistors having strained material layers
06/02/2005DE10354558A1 Vorrichtung zum Erzeugen eines Sendetaktsignals und eines Empfangstaktsignals für eine Sende- und Empfangsvorrichtung An apparatus for generating a transmit clock signal and a receiving clock signal for a transmitting and receiving device
06/02/2005DE10351604A1 Frequenzsynthesizer nach dem direkten digitalen Synthese-Verfahren A frequency synthesizer according to the direct digital synthesis method
06/02/2005DE10351101B3 Kompakte PLL-Schaltung Compact PLL circuit
06/02/2005DE102004050621A1 Digital circuit e.g. signal processor, for clock interpolation, has multiplier that multiplies frequency value of input signal measured by measuring circuit with interpolation factor and outputs multiplied value to oscillator
06/02/2005DE102004031448A1 Synchronous semiconductor memory device, has two clock buffers receiving external clock signal and clock bar signal through its non-inverting terminal and inverting terminal, and vice versa to output clock input signals
06/01/2005EP1536565A1 Signal processing device, signal processing method, delta-sigma modulation type fractional division pll frequency synthesizer, radio communication device, delta-sigma modulation type d/a converter
06/01/2005EP1536561A1 Current controlled oscillator
06/01/2005EP1535395A1 Method and device for injection locking of voltage controlled oscillators using direct digital tuning
06/01/2005EP1535390A2 Trimming of a two point phase modulator
06/01/2005EP1219062B1 Synchronizing pcm and pseudorandom clocks
06/01/2005CN1622623A Method and apparatus for searching next signal frame synchronous character in digital coding signal
06/01/2005CN1622495A System and method for control clock recovery unit locking switching in 40Gb/s optical transmission
06/01/2005CN1622467A Phase-locked loop frequency synthesizer
06/01/2005CN1622466A Phase-locked loop circuit having phase lock detection function and method for detecting phase lock thereof
06/01/2005CN1622465A Digital phase-locking loop
05/2005
05/31/2005US6901127 Method and apparatus for data recovery
05/31/2005US6901126 Time division multiplex data recovery system using close loop phase and delay locked loop
05/31/2005US6900976 Variable capacitor element and integrated circuit having variable capacitor element
05/31/2005US6900702 MEMS frequency standard for devices such as atomic clock
05/31/2005US6900700 Communication semiconductor integrated circuit and radio communication system
05/31/2005US6900699 Phase synchronous multiple LC tank oscillator
05/31/2005US6900685 Tunable delay circuit
05/31/2005US6900683 Apparatus and method for generating a predetermined time delay in a semiconductor circuit
05/31/2005US6900681 Phase interpolator and receiver for adjusting clock phases into data phases
05/31/2005US6900680 Clock controlling method and circuit
05/31/2005US6900679 Digital phase control circuit
05/31/2005US6900678 Delay lock circuit using bisection algorithm and related method
05/31/2005US6900677 Differential charge pump and method therefor, and phase locked loop and method therefor using the pump and method
05/31/2005US6900676 Clock generator for generating accurate and low-jitter clock
05/31/2005US6900675 All digital PLL trimming circuit
05/26/2005WO2005048455A1 Delayed locked loop phase blender circuit
05/26/2005WO2005048089A1 Direct digital frequency synthesizer
05/26/2005WO2005031548A3 Device used for the synchronization of clock signals, and clock signal synchronization method
05/26/2005WO2005013044A3 Clock generator with skew control
05/26/2005WO2005012925A3 Improved resource allocation technique
05/26/2005WO2005004332A3 Improved charge pump system for fast locking phase lock loop
05/26/2005WO2004055867A3 Tri-state charge pump
05/26/2005US20050114810 Process and device for timing analysis of a circuit
05/26/2005US20050111657 Weighted secret sharing and reconstructing method
05/26/2005US20050111607 Phase detector system with asynchronous output override
05/26/2005US20050111605 Low-jitter charge-pump phase-locked loop
05/26/2005US20050111602 Timing comparator, data sampling apparatus, and testing apparatus
05/26/2005US20050111589 Method and circuit for sensing the transition density of a signal and variable gain phase detecting method and device
05/26/2005US20050111318 Optical disc apparatus, clock signal generation method, program, and control apparatus
05/26/2005US20050110671 Dummy delay line based DLL and method for clocking in pipeline ADC
05/26/2005US20050110589 Self-tuning varactor system
05/26/2005US20050110588 Oscillator
05/26/2005US20050110582 Oscillator
05/26/2005US20050110581 Phase clock selector for generating a non-integer frequency division
05/26/2005US20050110580 PLL having a multi-level voltage-current converter and a method for locking a clock phase using multi-level voltage-current conversion
05/26/2005US20050110579 Generating an oscillating signal according to a control current
05/26/2005US20050110578 Voltage controlled oscillator with selectable frequency ranges
05/26/2005US20050110552 Generating adjustable-delay clock signal for processing color signals
05/26/2005US20050110548 Variable delay circuit
05/26/2005US20050110544 Clock recovery circuit and communication device
05/26/2005US20050110542 Delay locked loop capable of performing reliable locking operation
05/26/2005US20050110541 Delay locked loop
05/26/2005US20050110540 Delay locked loop and its control method
05/26/2005US20050110539 Digital delay-locked loop circuits with hierarchical delay adjustment
05/26/2005US20050110538 Phase detector and method of generating a phase-shift differential signal
05/26/2005US20050110537 Programmable phase-locked loop
05/26/2005US20050110536 Phase frequency detector with programmable minimum pulse width
05/26/2005US20050110535 Leakage compensation circuit
05/26/2005US20050110534 Variation of effective filter capacitance in phase lock loop circuit loop filters
05/26/2005US20050110533 Power up circuit
05/26/2005US20050110528 Voltage controlled oscillator (vco) with amplitude control
05/26/2005US20050110150 Semiconductor device and PLL circuit
05/25/2005EP1533936A1 Digital signal transmitting system and method, transmitting apparatus and method, and receiving apparatus and method
05/25/2005EP1532764A1 Method and arrangement for reducing phase jumps when switching between synchronisation sources
05/25/2005EP1532737A1 Synchronous mirror delay (smd) circuit and method including a counter and reduced size bi-directional delay line
05/25/2005EP1532729A2 Phase locked loop method and apparatus
05/25/2005EP1485989A4 Oscillator and pll circuit using the same
05/25/2005EP1425885B1 Method and system for transmitting data from a first data network into a second data network
05/25/2005CN1620778A Device for recovering data from a received data signal
05/25/2005CN1620758A Low voltage charge pump for use in a phase locked loop
05/25/2005CN1620645A Method and apparatus for timing and event processing in wireless systems
05/25/2005CN1619967A Method of dominant combination in passive atomic frequency scale system and its device
05/25/2005CN1619966A Delay locked loop and its control method
05/25/2005CN1619942A 振荡器 Oscillators
05/25/2005CN1619698A 延迟锁定回路 Delay locked loop
1 ... 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 ... 377