Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
11/2005
11/02/2005EP1592135A1 Phase lock loop gain control using unit current sources
11/02/2005EP1592125A1 Differential current mode phase/frequency detector circuit
11/02/2005EP1591846A2 Middle layer of die structure that comprises a cavity that holds an alkali metal
11/02/2005EP1591801A1 Automatic frequency control for a magnetron radar
11/02/2005EP1590960A2 Method for storing and transmitting data generated by a security module
11/02/2005CN1692554A Frequency locked loop with improved stability
11/02/2005CN1691655A Decision feedback equalizer and clock and data recovery circuit for high-speed applications
11/02/2005CN1691513A PLL circuit, radio-communication equipment and method of oscillation frequency control
11/02/2005CN1691512A Phase locked loop with adaptive loop bandwidth
11/02/2005CN1691511A Correction for dc-offset in a phase locked loop
11/02/2005CN1691510A Phase-locked loop detecting apparatus
11/02/2005CN1691509A Differential current mode phase/frequency detector circuit
11/02/2005CN1691203A Duty cycle correction apparatus and method for use in a semiconductor memory device
11/02/2005CN1225840C Circuit for frequency synthesizer
11/02/2005CN1225839C Method for smoothly change-over of main and spare clock for synchronous digital transmission equipment
11/02/2005CN1225838C Method and apparatus for coupled phase locked loops
11/01/2005US6961564 Method for enabling a subscriber entity to actively communicate in a communication network
11/01/2005US6961400 Automatic frequency correction apparatus and method of operation
11/01/2005US6961399 Phase locked loop including control circuit for reducing lock-time
11/01/2005US6960964 Oscillator
11/01/2005US6960962 Local oscillator leakage control in direct conversion processes
11/01/2005US6960960 Frequency detector detecting variation in frequency difference between data signal and clock signal
11/01/2005US6960953 Semiconductor circuit device
11/01/2005US6960950 Circuit and method for generating a clock signal
11/01/2005US6960949 Charge pump circuit and PLL circuit using same
11/01/2005US6960948 System with phase jumping locked loop circuit
11/01/2005US6960947 Phase-error-compensation techniques in a fractional-N PLL frequency synthesizer
11/01/2005US6960943 Suppressed micro phonic phase stable synthesizer
11/01/2005US6960942 High speed phase selector
11/01/2005US6960902 Conversion circuit for discriminating sourcing current and sinking current
10/2005
10/27/2005WO2005101773A1 Transmitter circuit, receiver circuit, clock extracting circuit, data transmitting method, and data transmitting system
10/27/2005WO2005101665A1 Phase locked loop circuit
10/27/2005WO2005101141A1 Method for modulating an atomic clock signal with coherent population trapping and corresponding atomic clock
10/27/2005US20050240791 Interleaved delay line for phase locked and delay locked loops
10/27/2005US20050239499 Communication semiconductor integrated circuit and radio communication system
10/27/2005US20050238129 False lock detection circuit and false lock detection method, PLL circuit and clock data recovery method, communication device and communication method, and optical disk reproducing device and optical disk reproducing method
10/27/2005US20050238128 Duty cycle correction apparatus and method for use in a semiconductor memory device
10/27/2005US20050238126 Multi rate clock data recovery based on multi sampling technique
10/27/2005US20050237828 Distributed loop components
10/27/2005US20050237125 PLL circuit, radio-communication equipment and method of oscillation frequency control
10/27/2005US20050237124 Oscillator and method for operating an oscillator
10/27/2005US20050237121 Apparatus
10/27/2005US20050237120 Phase-locked loop integrated circuits having fast phase locking characteristics
10/27/2005US20050237119 Frequency synthesizer, radio communication system using the synthesizer, and control method of the synthesizer
10/27/2005US20050237118 Precision relaxation oscillator without comparator delay errors
10/27/2005US20050237117 PLL and method for providing a single/multiple adjustable frequency range
10/27/2005US20050237104 Reference voltage generator circuit having temperature and process variation compensation and method of manufacturing same
10/27/2005US20050237093 Adjustable frequency delay-locked loop
10/27/2005US20050237092 Charge pump circuit reducing noise and charge error and PLL circuit using the same
10/27/2005US20050237091 Error-compensated charge pump circuit, and method for producing an error-compensated output current from a charge pump circuit
10/27/2005US20050237090 Frequency synthesizer and method
10/27/2005US20050237086 Correcting for DC offset in a phase locked loop
10/27/2005US20050236673 System and method for ESD protection
10/27/2005DE102005015764A1 Taktsignalgeneratorschaltung, elektronisches Gerät, Smartcard, Taktsignalerzeugungsverfahren und Steuerverfahren Clock signal generator circuit, electronic device, smart card, clock signal generating method and control method
10/27/2005DE102005015093A1 Testsignal-Erzeugungsschaltung und Empfangsschaltung Test signal generating circuit and receive circuit
10/27/2005DE102004058239A1 Bildwandler Image converter
10/27/2005DE102004050890A1 Datenempfänger mit servogesteuertem verzögertem Takt Data receiver comprising motorized delayed clock
10/27/2005DE102004016359A1 Abtastverfahren und -vorrichtung Scanning method and apparatus
10/27/2005DE102004015771A1 Anordnung zur Drehmomentmessung von rotierenden Maschinenteilen Arrangement for measuring torque of rotating machinery
10/27/2005DE10130508B4 Verzögerungsregelkreis mit komplementäre Signale erzeugender Verzögerungseinheit Delay locked loop with complementary signals generating delay unit
10/26/2005EP1589662A1 Correction for DC-offset in a phase locked loop
10/26/2005EP1588496A1 Transmitter having supplemental power source
10/26/2005EP1588489A1 Analogue/digital delay locked loop
10/26/2005EP1396084B1 Method for generating an internal clock pulse in an electric circuit and a corresponding electric circuit comprising a central clock-pulse generator
10/26/2005EP1316149B1 Bandwidth calibration for frequency locked loop
10/26/2005EP1214790B1 Direct digital frequency synthesis enabling spur elimination
10/26/2005EP1016232A4 Method and apparatus for splicing complete transport streams from multiple sources
10/26/2005CN1225089C Digital lock phase ring for producing multiple frequency point clock signal using one time delay chain
10/26/2005CN1225088C Method and apparatus for reducing oscillator noise by noise-feedforward
10/26/2005CN1225085C Circuit for formation of pulse signal from clock signal
10/26/2005CN1224876C Clock synchronous circuit
10/25/2005US6959397 Programmable skew clock signal generator selecting one of a plurality of delayed reference clock signals in response to a phase accumulator output
10/25/2005US6959064 Clock recovery PLL
10/25/2005US6959063 Fractional-N phase locked loop
10/25/2005US6959062 Variable delay line
10/25/2005US6959061 Phase comparator circuit
10/25/2005US6959016 Method and apparatus for adjusting the timing of signals over fine and coarse ranges
10/25/2005US6958951 Adaptive Kalman Filter process for controlling an ensemble clock
10/25/2005US6958657 Tuning a loop-filter of a PLL
10/25/2005US6958637 Spark current cancellation in charge pump of high speed phase lock loop circuit
10/25/2005US6958636 Charge leakage correction circuit for applications in PLLs
10/25/2005US6958635 Low-power direct digital synthesizer with analog interpolation
10/25/2005US6958634 Programmable direct interpolating delay locked loop
10/20/2005WO2005099164A1 Clock recovery in an oversampled serial communications system
10/20/2005WO2005099095A1 Half-step phase-locked loop
10/20/2005WO2005099094A2 Charge pump for a low-voltage wide-tuning range phase-locked loop
10/20/2005WO2005098383A1 Arrangement for measuring the torque of rotating machine parts
10/20/2005WO2005004331A3 Differential charge pump phase lock loop (pll) synthesizer with adjustable tuning voltage range
10/20/2005US20050232386 Synchronization circuit and synchronization method
10/20/2005US20050232385 Two-point frequency modulation apparatus, wireless transmitting apparatus, and wireless receiving apparatus
10/20/2005US20050232383 Timing recovery of PAM signals using baud rate interpolation
10/20/2005US20050231871 Three-phase power signal processor
10/20/2005US20050231493 Video signal processor, method using the same, display device and method using the same
10/20/2005US20050231408 Variable modulus interpolator, and a variable frequency synthesiser incorporating the variable modulus interpolator
10/20/2005US20050231292 Jitter generator
10/20/2005US20050231291 Phase controlled oscillator circuit with input signal coupler
10/20/2005US20050231271 Internal supply voltage generator for delay locked loop circuit
10/20/2005US20050231249 DLL circuit with delay equal to one clock cycle
10/20/2005US20050231248 Control circuit for delay locked loop
10/20/2005US20050231247 Delay locked loop