Patents for H03L 7 - Automatic control of frequency or phase; Synchronisation (37,643)
05/2007
05/15/2007CA2430778C Precision oven-controlled crystal oscillator
05/10/2007WO2007052820A1 Pll control circuit
05/10/2007WO2005109732A3 Low power direct conversion rf transceiver architecture and asic and systems including such
05/10/2007WO2005062920A3 System and method for mitigating noise associated with information communication
05/10/2007US20070103241 Clock signal generating circuit, semiconductor integrated circuit and method for controlling a frequency division ratio
05/10/2007US20070103240 Gain Calibration of a Digital Controlled Oscillator
05/10/2007US20070103239 Delta-sigma type fraction pll synthesizer
05/10/2007US20070103214 Switchable PLL circuit
05/10/2007US20070103213 Electronic Circuitry
05/10/2007US20070103212 Digital delay locked loop capable of correcting duty cycle and its method
05/10/2007US20070103211 Reset circuit
05/10/2007US20070103210 Power-on reset circuit for an integrated circuit
05/10/2007DE102005053442A1 Verfahren zur Stabilisierung der Sendefrequenz eines Sendesignals und Radargerät A method for stabilizing the transmission frequency of a transmission signal and radar device
05/09/2007EP1783914A1 Switchable PLL circuit including two loops
05/09/2007EP1783913A1 Switchable PLL circuit including two loops
05/09/2007EP1782534A1 Minimizing power consumption by tuning self-resonance in a frequency divider
05/09/2007EP1668465B1 Device used for the synchronization of clock signals, and clock signal synchronization method
05/09/2007EP1639709B1 Start up circuit for delay locked loop
05/09/2007EP1611684B1 Method of establishing an oscillator clock signal
05/09/2007EP1593199A4 Adaptive input logic for phase adjustments
05/09/2007EP1486000B1 Frequency converter and methods of use thereof
05/09/2007EP1219032B1 Method and arrangement for locking a control voltage to a voltage-controlled oscillator
05/09/2007EP1145440B1 Low jitter high phase resolution pll-based timing recovery system
05/09/2007CN1961482A System clock generator circuit
05/09/2007CN1960259A Implementation method of downloading files at same time in broadcasting network
05/09/2007CN1960186A Non-integer frequency division synthesizer and correlated method thereof
05/09/2007CN1960185A PLL transient response control system and communication system
05/09/2007CN1960184A Phase frequence detector capable of reducing dead zone range
05/09/2007CN1960183A Automatic adjusted oscillator with high accuracy
05/09/2007CN1960182A Direct digital frequency synthesizer of shaped frequency noise
05/09/2007CN1960164A CMOS of chip digital controlled complementary type LC oscillator in low noise
05/09/2007CN1315265C Receiver and IC
05/08/2007US7216249 Clock generation system
05/08/2007US7216247 Methods and systems to reduce data skew in FIFOs
05/08/2007US7215596 Circuit and method for controlling inversion of delay locked loop and delay locked loop and synchronous semiconductor memory device using the same
05/08/2007US7215215 Phase modulation apparatus, polar modulation transmission apparatus, wireless transmission apparatus and wireless communication apparatus
05/08/2007US7215211 Prescaler for a fractional-N synthesizer
05/08/2007US7215210 Clock signal outputting method, clock shaper and electronic equipment using the clock shaper
05/08/2007US7215209 Controllable idle time current mirror circuit for switching regulators, phase-locked loops, and delay-locked loops
05/08/2007US7215208 Fully integrated frequency generator
05/08/2007US7215207 Phase and frequency detection circuits for data communication systems
05/08/2007US7215181 High voltage generator circuit with ripple stabilization function
05/08/2007US7215167 Low noise microwave frequency synthesizer having fast switching
05/08/2007US7215166 DLL circuit with delay equal to one clock cycle
05/08/2007US7215165 Clock generating circuit and clock generating method
05/08/2007US7215164 Capacitance multiplier with enhanced gain and low power consumption
05/03/2007WO2007049490A1 Delay lock loop circuit, timing generator, semiconductor test device, semiconductor integrated circuit, and delay amount calibration method
05/03/2007WO2007030946A3 Apparatus and method of making pulse-shape measurements and method of correlating to rising chip edges
05/03/2007WO2006119171A3 Digital frequency synthesizer
05/03/2007US20070096835 Linearized charge pump having an offset
05/03/2007US20070096834 Pll frequency synthesizer
05/03/2007US20070096833 Phase-locked loop and method for operating a phase-locked-loop
05/03/2007US20070096785 DLL circuit and test method thereof
05/03/2007US20070096784 Delay locked loop circuit
05/03/2007US20070096783 Timing circuits with improved power supply jitter isolation technical background
05/03/2007US20070096782 Method and apparatus for fail-safe and restartable system clock generation
05/03/2007DE112005001517T5 Synchronisation zwischen Niedrigfrequenz- und Hochfrequenzdigitalsignalen Synchronization between low frequency and high frequency digital signals
05/03/2007DE10221156B4 Verfahren und Schaltungsanordnung zur Takt- und Datenrückgewinnung Method and circuit for clock and data recovery
05/03/2007DE102005050621A1 Phase-locked-loop for e.g. mobile communication device, has delay arrangement delaying input signal that is supplied to input of arrangement depending on sequence signal and releasing delayed signal to output of arrangement
05/02/2007EP1780893A1 Circuit to reset a phase locked loop after a loss of lock
05/02/2007EP1780892A1 Method of operating a radiation hardened phase locked loop
05/02/2007EP1779517A1 Digital frequency locked delay line
05/02/2007EP1779516A1 Master-slave flipflop for local oscillator and mixer in an i/q circuit
05/02/2007EP1425855B1 A wide band digital phase locked loop (pll) with a half-frequency output
05/02/2007CN1956392A Method, device and system for implementing multi-service type structure
05/02/2007CN1956338A DLL circuit and semiconductor device incorporating the same
05/02/2007CN1956337A Method and device for removing parasitic reference frequency in phaselocked loop frequency synthesizer
05/02/2007CN1956336A Delay-locked loop system and interrelated method
05/02/2007CN1956333A Duty cycle correction circuit, clock pulse generation circuits, and related apparatus and method
05/02/2007CN1956329A Clock generation circuit and method of generating clock signals
05/02/2007CN1956308A Power supply voltage control apparatus
05/02/2007CN1955746A Duty radio detecting circuit, dll circuit with the same and semiconductor device
05/02/2007CN1314205C Semiconductor integrated circuit
05/02/2007CN1314200C Excited wave form signal generating circuit
05/02/2007CN1314011C Detecting and correcting method for optical disc reading clock pulse and its circuit
05/01/2007US7212600 Method and apparatus for automatically producing clock signals for sampling data signals at different data rates via a phase locked loop
05/01/2007US7212117 Automatic wireless synchronization of electronic article surveillance systems
05/01/2007US7212073 Capacitive tuning network for low gain digitally controlled oscillator
05/01/2007US7212057 Measure-controlled circuit with frequency control
05/01/2007US7212054 DLL with adjustable phase shift using processed control signal
05/01/2007US7212053 Measure-initialized delay locked loop with live measurement
05/01/2007US7212052 Jitter suppressing delay locked loop circuits and related methods
05/01/2007US7212051 Control signal generation for a low jitter switched-capacitor frequency synthesizer
05/01/2007US7212050 System and method for synthesizing a clock at digital wrapper (FEC) and base frequencies using one precision resonator
05/01/2007US7212049 Digital-control-type phase-composing circuit system
05/01/2007US7212048 Multiple phase detection for delay loops
05/01/2007US7212047 Semiconductor integrated circuit having built-in PLL circuit
05/01/2007US7212046 Power-up signal generating apparatus
05/01/2007US7211963 Capacitive load driving circuit for driving capacitive loads such as pixels in plasma display panel, and plasma display apparatus
05/01/2007US7211777 Confocal microscope apparatus to measure a stereoscopic shape of a sample
05/01/2007CA2398779C Methods and apparatus for identifying asset location in communication networks
04/2007
04/26/2007WO2007045388A1 Signal generator with a directly recoverable dds signal source
04/26/2007WO2007045171A1 Analog phase-locked loop and method of realizing hold function thereof
04/26/2007US20070094549 Phase error determination method and digital phase-locked loop system
04/26/2007US20070094362 Method for automatically configuring terminal equipmet
04/26/2007US20070092039 Multi-channel serdes receiver for chip-to-chip and backplane interconnects and method of operation thereof
04/26/2007US20070090891 Power supply compensated voltage and current supply
04/26/2007US20070090890 Voltage-controlled oscillator with stable gain over a wide frequency range
04/26/2007US20070090887 Lock detect circuit for a phase locked loop
04/26/2007US20070090886 Radiation hardened phase locked loop